Display device

Active solid-state devices (e.g. – transistors – solid-state diode – Gate arrays – Having specific type of active device

Reexamination Certificate

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Details

C257S368000, C257S369000, C257S391000, C257S392000, C257S407000

Reexamination Certificate

active

10392862

ABSTRACT:
The present invention realizes a display device having C-MOS p-Si TFTs which enable the high integration by reducing spaces for P-MOS TFTs and N-MOS TFTs in driving circuit or the like thereof. The present invention adopts a self-aligned C-MOS process which uses a half tone mask as an exposure mask for manufacturing the C-MOS p-Si TFTs mounted on the display device. With the use of the half tone mask, the alignment or positioning at a bonding portion between a P-MOS portion and an N-MOS portion becomes unnecessary and hence, the number of photolithography steps can be reduced and the high integration of C-MOS TFT circuits can be realized.

REFERENCES:
patent: 4962413 (1990-10-01), Yamazaki et al.
patent: 5747854 (1998-05-01), Gotou
patent: 6255695 (2001-07-01), Kubota et al.
patent: 6639575 (2003-10-01), Tsunashima et al.
patent: 2002/0190346 (2002-12-01), Wong et al.
patent: 2003/0054613 (2003-03-01), Murakami et al.
patent: 09-064295 (1997-03-01), None

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