Computer graphics processing and selective visual display system – Plural physical display element control system – Display elements arranged in matrix
Reexamination Certificate
2006-10-17
2006-10-17
Hjerpe, Richard (Department: 2629)
Computer graphics processing and selective visual display system
Plural physical display element control system
Display elements arranged in matrix
C345S099000
Reexamination Certificate
active
07123237
ABSTRACT:
The present invention provides a display device which is capable of fetching input signals of a small amplitude into the inside thereof. A level converting circuit includes a first-conductive-type first transistor having a gate electrode to which input signals are applied through a first capacitive element, a second-conductive-type second transistor having a gate electrode to which input signals are applied through a second capacitive element, a first bias circuit which applies a first bias voltage to the gate electrode of the first transistor and a second bias circuit which applies a second bias voltage to the gate electrode of the second transistor. Here, the first bias voltage is a voltage which turns off the first transistor when a voltage applied to the gate electrode of the first transistor assumes a maximum value and the second bias voltage is a voltage which turns off the second transistor when a voltage applied to the gate electrode of the second transistor assumes a minimum value.
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Hiroshi Haga, Hiroshi Tsuchi, Katsumi Abe, Naoyasu Ikeda, Hideki Asada, Hiroshi Hayama, Kunihiro Shiota and Naruaki Takada, “A Parallel Digital-Data-Driver Architecture for Low-Power Poly-Si TFT-LCDs”, SID 02 Digest (2002), pp. 690-693.
Miyazawa Toshio
Nishitani Shigeyuki
Sato Hideo
A. Marquez, Esq. Juan Carlos
Fisher Esq. Stanley P.
Hitachi Displays Ltd.
Hjerpe Richard
Reed Smith LLP
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