Computer graphics processing and selective visual display system – Plural physical display element control system – Display elements arranged in matrix
Reexamination Certificate
2001-05-18
2004-04-13
Shankar, Vijay (Department: 2673)
Computer graphics processing and selective visual display system
Plural physical display element control system
Display elements arranged in matrix
C345S068000
Reexamination Certificate
active
06720939
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to a display device comprising a display panel such as a plasma display panel (hereinafter, referred to as “PDP”) and a driving circuit for driving the display panel.
2. Description of the Background Art
A display device will be discussed below, taking a case of a plasma display device as an example.
FIG. 14
is a block diagram showing a constitution of a plasma display device in the background art (see U.S. Pat. No. 2,894,039). A display panel
101
comprises a plurality of scan electrodes
102
extending in a first direction, common electrodes (not shown) which are paired with the scan electrodes
102
, respectively, and a plurality of address electrodes
103
separated from the scan electrodes
102
and the common electrodes, extending in a second direction perpendicular to the first direction.
The scan electrodes
102
are connected to a scan electrode driving circuit
104
. The address electrodes
103
are divided into four clusters in accordance with the positions in the display panel
101
. A plurality of address electrodes
103
belonging to the cluster corresponding to the leftmost quarter region of an image are connected to an address electrode driving circuit
105
i
. A plurality of address electrodes
103
belonging to the cluster corresponding to the left-center quarter region of the image are connected to an address electrode driving circuit
105
j
. A plurality of address electrodes
103
belonging to the cluster corresponding to the right-center quarter region of the image are connected to an address electrode driving circuit
105
k
. A plurality of address electrodes
103
belonging to the cluster corresponding to the rightmost quarter region of the image are connected to an address electrode driving circuit
105
l.
The scan electrode driving circuit
104
and the address electrode driving circuits
105
i
to
105
l
are connected to a control circuit
106
. Further, the address electrode driving circuits
105
i
to
105
l
are connected to a signal processing circuit
107
. The address electrode driving circuits
105
i
to
105
l
each have a shift register (not shown) therein. The signal processing circuit
107
is connected to the control circuit
106
.
The control circuit
106
receives a synchronizing signal from the outside and outputs a scan electrode driving control signal S
1
, a transfer data determination signal S
2
, a transfer clock TC and a signal processing control signal S
3
. The signal processing circuit
107
receives a video signal from the outside and the signal processing control signal S
3
from the control circuit
106
and outputs transfer data Di to Dl which are digital data.
The transfer data determination signal S
2
and the transfer clock TC are commonly inputted to the address electrode driving circuits
105
i
to
105
l
from the control circuit
106
. Further, the transfer data Di to Dl of the same phase are inputted to the address electrode driving circuits
105
i
to
105
l,
respectively, from the signal processing circuit
107
.
Thus, in the background-art plasma display device, the address electrodes
103
are divided into a plurality of clusters in accordance with the positions in the display panel
101
and the address electrode driving circuits
105
i
to
105
l
are provided correspondingly to the respective clusters of the address electrodes
103
. Therefore, it is possible to transmit the transfer data Di to Dl in parallel to the address electrode driving circuits
105
i
to
105
l
from the signal processing circuit
107
. Accordingly, it becomes possible to lower the speed of data transmission to the shift register in the address electrode driving circuit as compared with a plasma display device in which the address electrodes
103
are not divided into a plurality of clusters and the transfer data are transmitted in series to a single address electrode driving circuit from the signal processing circuit.
In the background-art plasma display device, however, the transfer data Di to Dl of the same phase are outputted from the signal processing circuit
107
and then the transfer data Di to Dl are stored in the shift registers of the address electrode driving circuits
105
i
to
105
l
, respectively, on the basis of the common transfer clock TC.
Therefore, a large amount of electromagnetic waves and magnetic fields are generated due to the transition of a plurality of digital data having the same phase at the same timing, which cause noises in a display image and affect other devices and circuits. For this reason, a tight electromagnetic shield is needed in the display device, which causes a rise in cost.
SUMMARY OF THE INVENTION
The present invention is directed to a display device. According to a first aspect of the present invention, the display device comprises: a display panel having a plurality of scan electrodes extending in a first direction and a plurality of address electrodes separated from the plurality of scan electrodes, extending in a second direction perpendicular to the first direction; a plurality of address electrode driving circuits connected to the plurality of address electrodes; and a signal processing circuit connected to the plurality of address electrode driving circuits, and in the display device of the first aspect, the plurality of address electrodes are divided into a plurality of clusters, the plurality of address electrode driving circuits are provided correspondingly to the plurality of clusters of the address electrodes and include a first and a second address electrode driving circuits, and digital data transmitted from the signal processing circuit to the first address electrode driving circuit and digital data transmitted from the signal processing circuit to the second address electrode driving circuit are different in phase from each other.
According to a second aspect of the present invention, in the display device, the plurality of address electrodes are divided into m (m is an integer, not less than two) clusters, the plurality of address electrode driving circuits are m address electrode driving circuits, and the digital data transmitted from the signal processing circuit to the m address electrode driving circuits are different in phase from one another.
According to a third aspect of the present invention, in the display device, the plurality of address electrodes are divided into m (m is an integer, not less than two) clusters, the plurality of address electrode driving circuits are m address electrode driving circuits, the m address electrode driving circuits are divided into n (n is an integer, not less than two and not more than m−1) groups, and the digital data inputted to one or a plurality of address electrode driving circuits belonging to same group are equivalent in phase to one another and the digital data inputted to a plurality of address electrode driving circuits belonging to different groups are different in phase from one another.
According to a fourth aspect of the present invention, in the display device, the signal processing circuit has a first register temporarily storing first digital data transmitted to the first address electrode driving circuit; a second register temporarily storing second digital data transmitted to the second address electrode driving circuit; a first delay element for delaying the first digital data outputted from the first register by a predetermined time and inputting the first digital data into the first address electrode driving circuit; and a second delay element for delaying the second digital data outputted from the second register by a time different from the predetermined time and inputting the second digital data into the second address electrode driving circuit.
According to a fifth aspect of the present invention, in the display device of any one of the first to fourth aspects, the plurality of scan electrodes include a plurality of first scan electrodes provided in a first region of the display panel and a plurality of second
Birch & Stewart Kolasch & Birch, LLP
Mitsubishi Denki & Kabushiki Kaisha
Patel Nitin
Shankar Vijay
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