Computer graphics processing and selective visual display system – Plural physical display element control system – Display elements arranged in matrix
Reexamination Certificate
2000-07-19
2003-05-13
Liang, Regina (Department: 2674)
Computer graphics processing and selective visual display system
Plural physical display element control system
Display elements arranged in matrix
C345S096000
Reexamination Certificate
active
06563482
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to a driving method suitable for a display device using a display medium such as liquid crystal in which pixels a matrix. Also, the present invention relates to a display device which conducts display by using the driving method. In particular, the present invention relates to an active matrix liquid crystal panel (liquid crystal panel) of the direct vision type.
2. Description of the Related Art
In recent years, a technique by which a semiconductor device in which a semiconductor thin film is formed on an insulating substrate, such as a thin film transistor (TFT), has been rapidly developed. The reason is that the liquid crystal panel (representatively, an active matrix liquid crystal panel) is increasingly demanded.
The active matrix liquid crystal panel is so designed that electric charges going into or out of pixels of several hundred thousands to several millions which are arranged in a matrix are controlled by pixel switching elements, thus displaying an image.
In the present specification, the pixel is directed to an element which is mainly made up of a switching element, a pixel electrode connected to the switching element and a counter electrode so disposed as to be opposed to the pixel electrode through the liquid crystal.
Hereinafter, a description will be given in brief of a representative example of the display operation of the active matrix liquid crystal panel with reference to FIGS.
19
A and l
9
B.
A source signal line driving circuit
103
and source signal lines S
1
to S
6
are connected to each other. Similarly, a gate signal line driving circuit
104
and gate signal lines G
1
to G
5
are connected to each other. A plurality of pixels
106
are disposed in a pixel portion
105
surrounded by the source signal lines S
1
to S
6
and the gate signal lines G
1
to G
5
. Each of the pixels
106
is equipped with a switching element
101
and a pixel electrode
102
. The numbers of source signal lines and gate signal lines are not limited to those values (FIG.
19
A).
FIG. 19B
is a diagram showing the positions of the plural elements
106
disposed in the pixel portion
105
(display pattern).
A video signal is supplied to the source signal line S
1
in response to a signal from a shift register circuit or the like (not shown) within the source signal line driving, circuit
103
. Also, a select signal is supplied to the gate signal line G
1
from the gate signal line driving circuit
104
, to thereby turn on the switching element
101
of a pixel (
1
,
1
) in a portion where the gate signal line G
1
and the source signal line S
1
cross each other. Then, the video signal is supplied to the pixel electrode of the pixel (
1
,
1
) from the source signal line S
1
. The liquid crystal is driven by the potential of the video signal thus supplied, and the amount of transmitted light is controlled, to thereby display a part of the image on the pixel (
1
,
1
) (an image corresponding to the pixel (
1
,
1
)).
Subsequently, while a state in which the image is displayed on the pixel (
1
,
1
) is maintained by storage capacitors (not shown) or the like, a video signal is supplied into the source signal line S
2
in response to a signal from a shift register circuit or the like (not shown) within the source signal line driving circuit
103
on the subsequent instant. In a state where the select signal is continued to be supplied to the gate signal line G
1
from the gate signal line driving circuit
104
, the switching element
101
of a pixel (
1
,
2
) in a portion where the gate signal line G
1
and the source signal line S
2
cross each other is turned on. Then, the potential of the video signal is applied to the pixel electrode of the pixel (
1
,
2
) from the source signal line S
2
. The liquid crystal is driven by the potential of the video signal thus supplied, and the amount of transmitted light is controlled, to thereby display a part of the image on the pixel (
1
,
2
), the same way as the pixel (
1
,
1
) (an image corresponding to the pixel (
1
,
2
)).
The above display operation is sequentially conducted, and a part of the image is displayed on the pixels (
1
,
1
), (
1
,
2
), (
1
,
3
), (
1
,
4
), (
1
,
5
) and (
1
,
6
) which are connected to the gate signal line G
1
in sequence. During this operation, the select signal is continued to be supplied to the gate signal line G
1
.
Upon supply of the video signal to all of the pixels connected to the gate signal line G
1
, the select signal is stopped from being supplied to the gate signal line G
1
, and subsequently the select signal is supplied to only the gate signal line G
2
. Then, a part of the image is displayed on the pixels (
2
,
1
), (
2
,
2
), (
2
,
3
), (
2
,
4
), (
2
,
5
) and (
2
,
6
) which are connected to the gate signal line G
2
in sequence. During this operation, the select signal is continued to be supplied to the gate signal line G
2
. All of the gate signal lines are subjected to the above display operation, to thereby display one screen (frame) on a display area. This period is called “one frame period” (FIG.
19
B).
Until a part of the image is displayed on a pixel (
4
,
6
) to which the video signal is finally supplied, all of other pixels retain a state where the image is displayed by the storage capacitors (not shown) or the like.
Those display operation is sequentially repeated, to thereby display the image on the pixel portion
105
.
As usual, in the liquid crystal panel using TFTs or the like as the switching elements, in order to prevent a liquid crystal material from being deteriorated, the polarity of the potential of the signal supplied to each of the pixels is inverted (alternating current inverse driving) on the basis of a common potential.
As one inverse driving method, there has been proposed a source line inverse driving method.
FIG. 20A
shows the polarity pattern of the pixels in the source line inverse driving operation. The polarity pattern shown in
FIG. 20
corresponds to the display pattern shown in FIG.
19
B.
In
FIGS. 20
,
22
and
23
showing the polarity pattern, if the potential of the video signal which is supplied to the pixels is positive on the basis of the common potential, the polarity is indicated by “+”, whereas if it is negative, the polarity is indicated by “−”.
In addition, as a scanning method, there has been proposed an interlace scanning method in which every two gate signal lines of one screen (one frame) are jumped over to conduct the scanning operation twice (two fields), and a non-interlace scanning method in which the scanning operation is conducted in order without jumping over the gate signal lines. In this specification, an example in which the non-interlace scanning method is employed will be mainly described.
As shown in
FIG. 20A
, the feature of the source line inverse driving operation resides in that, in an arbitrary one-frame period, the video signals of the same polarity are supplied to all of the pixels which are connected to the same source signal line, and the video signals opposite to each other in the polarity are supplied to the pixels connected to the adjacent source signal lines. Then, in a succeeding one-frame period, the video signals opposite in polarity to that of the polarity pattern (
1
) displayed in a one-frame period immediately before the current one-frame period are supplied to the respective pixels, to thereby display a polarity pattern (
2
).
Also, as another inverse driving method, there has been proposed a gate line inverse driving method. The polarity pattern of the gate line inverse driving method is shown in FIG.
20
B.
As shown in
FIG. 20B
, in an arbitrary one-frame period, the video signals of the same polarity are supplied to all of the pixels which are connected to the same gate signal line, and the video signals opposite to each other in the polarity are supplied to the pixels connected to the adjacent gate signal lines. Then, in a succeeding one-frame period, the video signals opposite in polarity to
Koyama Jun
Yamagata Hirokazu
Yamazaki Shunpei
Cook Alex McFarron Manzo Cummings & Mehler, Ltd.
Liang Regina
Semiconductor Energy Laboratory Co,. Ltd.
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