Display data readout circuit

Details Display data readout circuit Display data readout circuit

1994-11-09

1998-01-06

Hjerpe, Richard

Computer graphics processing and selective visual display system

Display driving control circuitry

Physically integral with display elements

345185, 395507, G09G 500

Patent

active

057060339

ABSTRACT:
The display data read out circuit of this invention includes a CPU, data and address buses, a display data address circuit, and an address switching circuit. In a case where a refresh signal from the CPU is in an enable state, the address switching circuit outputs a display data address, obtained from the display data address circuit, into an external memory through the address bus. On the other hand, when the refresh signal is not in the enable state, the address switching circuit outputs an address from the CPU into the external memory through the address bus. Thus, the circuit of this invention transfers display data into the external display using the refresh period of the CPU. This improves the throughput of this CPU.

REFERENCES:
patent: 4332008 (1982-05-01), Shima et al.
patent: 4342095 (1982-07-01), Goodman
patent: 4462084 (1984-07-01), Greenwood
patent: 4604615 (1986-08-01), Funahashi
patent: 4628467 (1986-12-01), Nishi et al.
patent: 4660156 (1987-04-01), Guttag et al.
patent: 5343395 (1994-08-01), Watts

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