Display controller, image display and method for...

Details Display controller, image display and method for... Display controller, image display and method for...

2007-06-19

2007-06-19

Awad, Amr A. (Department: 2629)

Computer graphics processing and selective visual display system

Plural physical display element control system

Display elements arranged in matrix

C345S544000, C348S478000

Reexamination Certificate

active

10495113

ABSTRACT:
A decoder includes a first bank and a second bank. The first bank is supplied with dynamic control from a microcomputer via a data bus, and the second bank is supplied with static control data from the data bus via the data bus. The dynamic control data or the static control data is read from an address in the bank designated by an address signal. The dynamic control data read from the first bank and second bank is transferred to one of a plurality of registers designated by the address signal.

REFERENCES:
patent: 5661523 (1997-08-01), Yamane
patent: 5699124 (1997-12-01), Nuber et al.
patent: 6351289 (2002-02-01), Chen et al.
patent: 6573931 (2003-06-01), Horii et al.
patent: 6879347 (2005-04-01), French
patent: 1111578 (2001-06-01), None
patent: 5-127608 (1993-05-01), None
patent: 10-4516 (1998-01-01), None
patent: 2001-27890 (2001-01-01), None
patent: 2001-92436 (2001-04-01), None
English language Abstract of JP 5-127608.

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