Computer graphics processing and selective visual display system – Plural physical display element control system – Display elements arranged in matrix
Reissue Patent
1999-12-23
2002-02-19
Liang, Regina (Department: 2674)
Computer graphics processing and selective visual display system
Plural physical display element control system
Display elements arranged in matrix
C348S554000, C345S182000, C345S182000, C707S793000
Reissue Patent
active
RE037551
ABSTRACT:
BACKGROUND OF THE INVENTION
The present invention relates to a liquid crystal display and, in particular, to a display and a display method in which video signals of a plurality of signal standards can be displayed in a similar manner as for multiscan-type displays.
DESCRIPTION OF THE RELATED ART
Recently, liquid crystal displays having features such as decreased thickness, lower-voltage operation, and reduced power consumption have been practically applied in place of cathode-ray tube (CRT) displays to personal computers, word processors, color television sets, etc.
A multiscan-type or multisync-type display is a display configured to present images in a plurality of resolutions by a multiscan function (i.e., an automatic frequency follow-up function with synchronization set to various kinds of signals). For example, video signals having resolutions of 640×400, 640×480, 1024×768, and 1120×750 dots can be displayed as images on a screen of one display. In this connection, “MULTISYNC” is a registered trademark of NEC HOME ELECTRONICS (U.S.A.) INC. in accordance with the U.S. trademark registered No. 1,443,951.
Conventionally, when handling input signals of a plurality of signal standards by one liquid crystal display (LCD), there is conducted correction of display positions for fear of positional difference in the vertical and horizontal directions associated with input signals. For example, a control circuit for use with a liquid crystal display has been described in the Japanese Patent Laid-Open Publication No. Hei-3-280084 as shown in FIG.
1
.
Referring to
FIG. 1
, the conventional liquid crystal display controller disclosed by the Japanese Patent Laid-Open Publication No. Hei-3-280084 (to be referred to as conventional example 1 herebelow) includes a vertical synchronization (sync) signal discriminator
71
, a horizontal sync signal discriminator
72
, a screen mode storage circuit
73
, a logical converter for horizontal and vertical sync signals
74
, and a liquid crystal controller
75
. The vertical sync signal discriminator
71
includes a frequency divider
76
and a latch circuit
77
, whereas the horizontal sync signal discriminator
72
includes a divider
78
and a latch circuit
79
.
Next, description will be given of operation of the conventional liquid crystal display controller shown in FIG.
1
.
A vertical sync signal VS and a horizontal sync signal HS supplied to the controller are fed respectively to the vertical sync signal discriminator
71
and the horizontal sync signal discriminator
72
for decision of
to determine the
polarity of each sync signal. For example, when the discriminator
71
or
72
produces a high-level signal, the associated sync signal is assumed to be positive; conversely, when the discriminator
71
or
72
produces a low-level signal, the associated sync signal is assumed to be negative.
Subsequently, the signals created from the discriminating circuits
71
and
72
are delivered to the screen mode storage
73
in the next stage to be supplied therefrom to the logical converter for horizontal and vertical sync signals
74
and liquid crystal controller
75
. A horizontal sync signal HS and a vertical sync signal VS outputted from the converter
74
are set respectively to predetermined logical states through signal conversion regardless of a mode of screen operation.
On the other hand, in the liquid crystal controller
75
, the received signals are processed for appropriate vertical and horizontal screen positions in each screen mode according to data from the screen mode memory
73
. For example, when the horizontal and vertical sync signals HS and VS are assumed to be negative as shown in
FIG. 2
, the signal currently inputted thereto is judged to be in A mode and hence is automatically displayed in a central portion of the screen of the liquid crystal panel.
In the control operation above, according to the signals obtained by respectively judging the horizontal and vertical sync signals HS and VS, the image can be automatically displayed in the central portion of the screen.
Namely, it is possible to prevent the image from being presented in a portion shifted from the central portion in the screen of the liquid crystal panel.
However, in the method of the prior art, the control operation is accomplished according to two signals, i.e., horizontal and vertical sync signals HS and VS as described above, it is possible to cope with signals in only four modes.
Modifying a portion of the circuit configuration of conventional example 1, a liquid crystal display (LCD) controller of
FIG. 3
has been proposed to appropriately correct the display position, for example, in the Japanese Patent Laid-Open Publication No. Hei-3-280085.
The LCD controller of
FIG. 3
described in the Japanese Patent Laid-Open No. Hei-3-280085 (to be referred to as conventional example 2 herebelow) includes a vertical sync signal discriminator
81
, a circuit to judge relationship between horizontal and vertical sync signals
82
, a screen mode circuit
83
, a logical converter for horizontal and vertical sync signals
84
, and a liquid crystal controller
85
.
The vertical sync signal discriminator
81
includes a counter circuit
86
and a latch circuit
87
, whereas the relation discriminator
82
includes a delay circuit
88
, a gate circuit
89
, and a counter
90
.
Operation of conventional example 2 will be now described.
A vertical sync signal VS and a horizontal sync signal HS inputted to the system are fed to the vertical sync signal discriminator
81
and the relationship discriminator
82
.
The vertical sync signal discriminator
81
is
adopted
adapted
to decide polarity of the vertical sync signal VS supplied to the system. The operation of the discriminator circuit
81
is the same as that of conventional example 1 and hence description thereof will be unnecessary.
Subsequently, description will be given of the relationship discriminator
82
.
In the logical converter
84
, the logical state of the vertical sync signal VS is inverted when necessary according to a signal produced from the vertical sync signal discriminator
81
such that a positive-logic vertical sync signal VS is fed to the delay circuit
88
. In the delay circuit
88
, the vertical sync signal VS is delayed such that a delay sync signal DVS is delivered to the gate circuit
89
.
In the gate circuit
89
, a logical product is created between the delayed vertical sync signal DVS and the horizontal sync signal HS to resultantly output a logical product signal DVH to the counter
90
. In the counter
90
, the logical product signal DVH is counted at timing synchronized with the vertical sync signal VS so as to send a resultant signal to the screen mode circuit
83
.
In the circuit
83
, the value obtained by counting the logical product signal DVH is transformed into a screen mode. For example, when the count of signal DVH is 3, A mode is assumed; whereas, when the count is 2, B mode is assumed as shown in FIG.
4
.
When the screen mode is thus decided, a check is carried out to determine whether the horizontal sync signal HS is positive or negative. Consequently, an instruction is supplied to the logical converter
84
to convert the horizontal sync signal into, for example, a horizontal sync signal HS of the positive logic.
In the liquid crystal controller
85
, according to data from the screen mode circuit
83
in the same fashion as for conventional example 1, the vertical and horizontal positions are processed in each screen mode. However, in conventional example 2, the screen mode is discriminated as shown in
FIG. 10
, which is different from the operation of conventional example 1.
In conventional example 2 described above, the
screeen
screen
mode is automatically detected from the horizontal and vertical sync signals so that the horizontal and vertical positions are automatically set in the screen according to the detected screen mode. That is, the image is presented in the central portion of the screen in an automatic manner. Namely,
Liang Regina
NEC Corporation
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