Computer graphics processing and selective visual display system – Display driving control circuitry
Reexamination Certificate
1998-11-30
2002-02-05
Wu, Xiao (Department: 2674)
Computer graphics processing and selective visual display system
Display driving control circuitry
C345S560000
Reexamination Certificate
active
06344849
ABSTRACT:
BACKGROUND OF THE INVENTION
The present invention relates to a display control circuit, and more particularly to a display control circuit suitable for a multi-screen display
Multi-screen displays have been used for various systems such as car navigation systems. Differently from a display control circuit for personal computer display, the display control circuit for multi-screen display is required to have a capability of controlling parallel transfers of multiple screen data separately. The display control circuit for multi-screen display will hereinafter be referred to as “display control circuit”.
FIG. 1
is a block diagram illustrative of a conventional display control system for controlling a multi-screen display. The conventional display control system comprises a display memory
1
, a display control circuit
2
and a monitor
3
. The conventional display control system is to display n-number screens. The display memory
1
has first to nth screen data memory spaces
7
,
6
,
5
, - - -
4
. The first screen data memory space
7
stores first screen data
1
. The second screen data memory space
6
stores second screen data
2
. The third screen data memory space
5
stores third screen data. The nth screen data memory space
4
stores nth screen data. A first screen data signal al is fetched from the first screen data memory space
7
. A second screen data signal a
2
is fetched from the second screen data memory space
6
. A third screen data signal a
3
is fetched from the third screen data memory space
5
. A nth screen data signal an is fetched from the nth screen data memory space
4
. A signal b is transmitted from the display memory
1
to the display control circuit
2
. The display control circuit
2
has n-number line buffers
11
,
10
,
9
, and
8
and a transmission-control/priority-control circuit
12
. A first line buffer
11
receives a first line buffer write signal c
1
. A second line buffer
10
receives a second line buffer write signal c
2
. A third line buffer
9
receives a third line buffer write signal c
3
. A nth line buffer
8
receives a nth line buffer write signal c
4
. The transmission-control/priority-control circuit
12
is connected to the line buffers
11
,
10
,
9
, and
8
so as to fetch first to nth line buffer read out signals e
1
- - - en from the first to nth line buffers
11
,
10
,
9
, and
8
. The transmission-control/priority-control circuit
12
is capable of performing both a transmission-control which changes priorities of plural screen data and a priority-control which select higher one of the plural screen data. A final data signal f is transmitted from the transmission-control/priority-control circuit
12
to the monitor
3
.
FIG. 2
is a timing chart illustrative of plural screen data signal transmissions of the display control circuit of FIG.
1
. The description is directed to transmissions of screen data from the display memory
1
to the line buffers
11
,
10
,
9
, and
8
of the display control screen. First screen data d
10
, d
11
, d
12
and d
13
are read out from the first screen data memory space
7
of the display memory
1
and then transferred as the first screen data signal a
1
, the signal b and the first line buffer write signal c
1
to the first line buffer
11
in the display control circuit
2
. Subsequently, second screen data d
20
, d
21
, d
22
and d
23
are read out from the second screen data memory space
6
of the display memory
1
and then transferred as the second screen data signal a
2
, the signal b and the second line buffer write signal c
2
to the second line buffer
10
in the display control circuit
2
. Subsequently, third screen data d
30
, d
31
, d
32
and d
33
are read out from the third screen data memory space
5
of the display memory
1
and then transferred as the third screen data signal a
3
, the signal b and the third line buffer write signal c
3
to the third line buffer
9
in the display control circuit
2
. Subsequently, nth screen data dn
0
, da
1
, dn
2
and dn
3
are read out from the nth screen data memory space
4
of the display memory
1
and then transferred as the nth screen data signal an, the signal b and the nth line buffer write signal cn to the nth line buffer
8
in the display control circuit
2
.
Subsequently, data e
1
to en arc concurrently read out and transmitted into the transmission-control/priority-control circuit
12
for conducting transmission-control and priority-control of the data e
1
to en, thereby selecting one of the data e
1
to en to put out the selected one of the data e
1
to en as a data set f of selected data (dx
0
, dx
1
, dx
2
and dx
3
) to the monitor.
The above conventional display control system has the following disadvantages. It is required for the above prior art to provide the same number of line buffers as the number of kinds of the screen data. The line buffers has a relatively large ratio in occupied area to the display control circuit
2
, for which reason a large increase in the number of kinds of the screen data results in a large increase in the size of the display control circuit
2
. This further increases in a cost of the display control system.
Further, during no transmission of screen data from the display memory
1
to the display control circuit
2
, other processings are executed such as access from CPU to the display memory and access from a drawing control circuit to the display memory. Shortening the necessary time for transmission of the screen data from the display memory
1
to the display control circuit
2
allows an increase in time for other processings to improve high speed performances of the display system.
It is, however, difficult for the conventional display system to shorten the necessary time for transmission of the screen data from the display memory
1
to the display control circuit
2
for the following grounds. All of the screen data are stored into the plural line buffers before the transmission-control and the priority control are made by the transmission-control/priority-control circuit in the display control circuit, This means that it is possible to determine whether the data priority is highest or not after all of the screen data have already been stored. Namely, in any cases, it is necessarily required for the conventional display system to transmit all of the screen data. This means that increase in the number of kinds of the screen data results in an increase in the necessary transmission time of the signals from the display memory
1
to the display control circuit
2
. Namely, it is difficult for the conventional display system to shorten the necessary transmission time of the signals from the display memory
1
to the display control circuit
2
.
In the above circumstances, it had been required to develop a novel display control circuit free from the above problems and disadvantages.
SUMMARY OF THE INVENTION
Accordingly, it is an object of the present invention to provide a novel display control circuit free from the above problems.
It is a further object of the present invention to provide a novel display control circuit having a smaller number of line buffers than the number of kinds of screen data for reduction in circuit size.
It is a still further object of the present invention to provide a novel display control circuit capable of conducting transmission-control and priority-control of screen data before the screen data are stored into line buffers so that if screen data to be transmitted have a highest priority, then subsequent data transmission will be omitted in order to shorten the time of transmission of the screen data from the display memory to the line buffers.
The first present invention provides a display control circuit comprising: a data storing unit for storing data; and a comparing and selecting unit connected to the data storing unit for comparing a current priority of a currently supplied data set with a previous priority a previously supplied data set stored in the storing data unit so as to write priority-higher one of the currently supp
NEC Corporation
Wu Xiao
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