Computer graphics processing and selective visual display system – Computer graphics processing – Attributes
Reexamination Certificate
2001-11-15
2004-09-07
Tran, Henry N. (Department: 2674)
Computer graphics processing and selective visual display system
Computer graphics processing
Attributes
C345S089000, C345S690000, C345S063000, C348S254000, C348S671000, C358S451000, C358S451000, C358S451000, C358S451000, C358S451000, C382S274000, C382S251000, C382S252000
Reexamination Certificate
active
06788306
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention is related to a display apparatus. More particularly, the present invention is related to a display apparatus displaying pseudo gray levels or shades and method for displaying the same.
2. Description of the Related Art
A large number of gray levels are requested for improving the quality of pictures displayed by display devices, such as an LCD (Liquid Crystal Display) and a PDP (Plasma Display Panel). However, the limited number of gray levels are available in such display devices.
A pseudo gray level method is often used for increasing the number of displayable gray levels. The pseudo gray level method generates an m-bit gray level signal from an original n-bit gray level signal (n being larger than m) to enable the display which can physically display 2
m
gray levels to display 2
n
gray levels in appearance.
A pseudo gray level processor for implementing the pseudo gray level method is disclosed by Matsunaga et al. in Japanese Laid Open Patent Application (JP-A-Heisei 9-90902). The conventional pseudo gray level processor implements the error diffusion method for displaying pseudo gray levels. The conventional pseudo gray level processor is provided with a one-dot delay circuit
151
, a first adder
152
, an error diffusion calculating circuit
156
and a an initial value setting circuit
170
, as shown in FIG.
1
. The error diffusion calculating circuit
156
is composed of a second adder
158
, a one-dot delay circuit
160
, a switching circuit
162
, a calculation control circuit
164
and a threshold setting circuit
168
. The initial value setting circuit
170
is composed of an initial value setting ROM
172
, a line counter
174
and a frame counter
176
.
The error diffusion calculating circuit
156
carries out an error diffusion calculation on the basis of a lower bit data A which is lower (n−m) bits of an n-bit (for example, 8-bit) input picture data. The calculation control circuit
164
calculates a value &dgr; by
&dgr;=
D−S,
where D is a value sent from the one-dot delay circuit
160
, and S is a threshold sent from the threshold setting circuit
168
. Then the calculation control circuit
164
sends “1” as a carry value E to the first adder
152
when the value &dgr; is 0 or more.
The first adder
152
adds the carry value E and data B that is upper m bits (for example, 5 bits) of the picture signal to generate a pseudo gray level data F. The first adder
152
outputs the pseudo gray level data F to a display panel.
The initial value setting circuit
170
sends an initial value of the error diffusion calculating circuit
156
. The initial value is different for each line of the display panel to erase the directivity of a diffusion pattern. Moreover, the pseudo gray level processor does not require a line memory for each line of the display panel.
However, the number of gray levels that can be represented by the pseudo gray level data F is smaller than the number of gray levels that can be represented by an input picture data A. The reason is as follows. If all the upper m bits of the input picture data A are “1”, all the bits of the pseudo gray level data F are “1” for any values of the lower bits (n−m) of the input picture data A. The number of gray level in which the upper m bits are all “1” is 2(n−m). When the input picture data representative of any of the 2(n−m) gray levels is inputted, the pseudo gray level data F have the value in which all the bits are “1”. Therefore, the pseudo gray level data F can represent only 2
n
−2
(n−m)
+1 gray levels. The pseudo gray level processor desirably allows the pseudo gray level data of m bits to represent all the 2
n
gray levels for n larger than m.
Frame rate control is another typical technique for increasing displayable gray levels. A frame rate control method is disclosed by Miyatake in Japanese Laid Open Patent Application (Jp-A-Heisei 7-120725). Miyatake describes a method for driving a LCD in which a gray level signal applied to an LCD pixel is switched every frame and has different signs and effective voltages for former n frames and latter n frames of successive 2n frames.
Still another technique which may be related to the present invention is disclosed by Furuhashi et al. in Japanese Laid Open Patent Application (Jp-A-Heisei 9-106267). Furuhashi et al. disclose an LCD for increasing contrast. One electrode of each LCD pixel is a drive electrode driven by a LCD driver, and another is a common plate electrode. The LCD includes a plate electrode driver for driving the plate electrode. The plate electrode driver latches the upper bits of the gray level data, and outputs one of predetermined voltages in response to the upper bits. The plate electrode driver allows the LCD pixels to be applied with a voltage larger than a dynamic range of the LCD driver, and increase the contrast of the LCD. However, Furuhashi et al. does not describe the pseudo gray levels.
SUMMARY OF THE INVENTION
Therefore, the object of the present invention is to provide an improved method for displaying pseudo gray levels.
More particularly, the object of the present invention is to provide a pseudo gray level processor which allows the pseudo gray level data of m bits to represent all the 2
n
gray levels for n larger than m.
Another object of the present invention is to provide a pseudo gray level processor for generating an m-bit pseudo gray level signal from an n-bit input gray level signal (n being larger than m) such that a fixed pattern is hard to be induced in a picture displayed by a display apparatus.
In order to achieve an aspect of the present invention, a display apparatus is composed of a pseudo gray level data processor. The pseudo gray level data processor generates pseudo gray level data having m bits based on input gray level data having n bits representative of an input gray level of 2
n
gray levels, where n is a natural number equal to or more than 2, and m is a natural number less than n. The pseudo gray level data processor includes a state variable generator, an adder and a pseudo gray level data generator. The state variable generator generates a state variable data having n−m bit(s) on the basis of lower n−m bit(s) of the input gray level data. The adder calculates a sum of the lower n−m bit(s) of the input gray level data and the state variable data, and outputs a carry bit representative of carry-over of the sum. The pseudo gray level data generator generates the pseudo gray level data based on the input gray level data and the carry bit. In a first case when the carry bit is “0” and the input gray level belongs to first gray levels of the 2
n
gray levels, the pseudo gray level data generator defines the pseudo gray level data such that the pseudo gray level data equals upper m bits of the input gray level data in a first case. In a second case when the carry bit is “1” and the input gray level data belongs to the first gray levels, the pseudo gray level data generator defines the pseudo gray level data such that upper m−1 bit(s) of the pseudo gray level data equals upper m−1 bit(s) of the input gray level data and the LSB (least significant bit) of the pseudo gray level data is selected from “0” and “1”.
It is desirable that upper m−1 bit(s) of the input gray level data are “1” and the m-th significant bit of the input gray level data is “0” when the input gray level data represents any one of the first gray levels.
In addition, a first probability of the LSB of the pseudo gray level data being “0” in the second case substantially equals a second probability of the LSB of the pseudo gray level data being “1” in the second case.
When the display apparatus further includes a pixel matrix unit including pixels displaying a displaying gray level indicated by the pseudo gray level data, the pseudo gray level data generator preferably determines the LSB of the pseudo gray level data in response to a position of the pixels in the pixel matrix unit.
Hirano Youji
Yamaguchi Machihiko
Foley and Lardner LLP
NEC LCD Technologies Ltd.
Tran Henry N.
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