Display apparatus and driving method therefor, and...

Computer graphics processing and selective visual display system – Plural physical display element control system – Display elements arranged in matrix

Reexamination Certificate

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Details

C345S080000, C345S204000, C345S082000, C315S169300, C313S463000, C313S509000, C377S063000, C377S067000, C377S069000

Reexamination Certificate

active

08044894

ABSTRACT:
After a sampling transistor is turned ON at a first timing when a control signal has risen, during a sampling period from a second timing when a video signal has risen from a reference potential to a signal potential to a third timing when the control signal has fallen and is turned OFF, the sampling transistor samples and writes the signal potential in a holding capacitance, and negatively feeds back a current flowing into a drive transistor during the sampling period to the holding capacitance and applies mobility correction of the drive transistor on the written signal potential. A signal driver adjusts the second timing for the video signal supplied to respective signal lines to correct a backward shift of the third timing due to a transmission delay along a scanning line of the control signal output from the control scanner.

REFERENCES:
patent: 2003-255856 (2003-09-01), None
patent: 2003-271095 (2003-09-01), None
patent: 2004-029791 (2004-01-01), None
patent: 2004-093682 (2004-03-01), None
patent: 2004-133240 (2004-04-01), None
patent: 2006-215213 (2006-08-01), None
patent: 2007-034001 (2007-02-01), None
patent: 2007-034225 (2007-02-01), None
patent: 2007-310311 (2007-11-01), None
patent: 2008-009198 (2008-01-01), None
patent: 2008-040024 (2008-02-01), None
Japanese Office Action issued Mar. 17, 2009 for corresponding Japanese Application No. 2007-074986.

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