Computer graphics processing and selective visual display system – Plural physical display element control system – Display elements arranged in matrix
Reexamination Certificate
2011-03-08
2011-03-08
Osorio, Ricardo L (Department: 2629)
Computer graphics processing and selective visual display system
Plural physical display element control system
Display elements arranged in matrix
C345S076000
Reexamination Certificate
active
07903057
ABSTRACT:
A sampling transistor T1is brought into conduction in accordance with a control signal supplied from a scanning line WS, and writes to a holding capacitor C1a video signal supplied from a signal line SL. A driving transistor T2outputs a driving current to an output node S in accordance with a signal potential of the video signal written to the holding capacitor C1. A switching transistor T3is arranged between the output node S and a light-emitting device EL. In a predetermined light-emission period, the switching transistor T3is in an on-state, and supplies the driving current to the light-emitting device EL to cause the light-emitting device EL to emit light at a brightness corresponding to the video signal. In contrast, in a non-light-emission period, the switching transistor T3is turned off to disconnect the light-emitting device EL from the output node S, so that a potential generated at the output node S due to an operation of a pixel2performed in the non-light-emission period is prevented from being applied as a reverse-bias voltage to the light-emitting device EL of a diode type.
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Uchino Katsuhide
Yamamoto Tetsuro
Osorio Ricardo L
Rader & Fishman & Grauer, PLLC
Sony Corporation
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