Communications: electrical – Land vehicle alarms or indicators – Internal alarm or indicator responsive to a condition of the...
Patent
1984-09-27
1987-06-30
Curtis, Marshall M.
Communications: electrical
Land vehicle alarms or indicators
Internal alarm or indicator responsive to a condition of the...
340801, 340750, G09G 116
Patent
active
046774327
DESCRIPTION:
BRIEF SUMMARY
TECHNICAL FIELD
This invention relates to a technique suitable for use in a display apparatus such as teletext, videotex and the like by which when a display dot of reference size is added with a smaller display dot than the former so as to make a display pattern easy to see, the latency time of a CPU can be reduced.
BACKGROUND ART
In a television broadcasting, a television character multiplexing broadcasting is proposed in which the vertical blanking period of a main television program is utilized to broadcast various kinds of information such as news, weather forecast, notice and so on.
In a receiver for receiving such broadcast, the display apparatus thereof is constructed as shown in FIG. 1.
In FIG. 1, when a pattern data to be displayed is received, this display pattern data is processed by a CPU 1 and then written in a pattern memory 2. In this pattern memory 2, its addresses Axy are schematically shown in response to a display picture screen as shown in FIG. 1. In this case, a horizontal address (address in the horizontal direction) Ax corresponds to the horizontal scanning position of the display picture screen, while a line address (address in the vertical direction) Ay corresponds to the vertical scanning position, or the horizontal line (scanning line), wherein picture screen and for example,
Each bit of the memory 2 corresponds to each dot of a display pattern and a bit having level "1" is displayed as a dot (bright point).
A control circuit 6 generates an address signal which designates the horizontal address Ax, namely, a horizontal address signal HAS which is incremented one by one for every one byte (8 bits) of the pattern data in synchronism with the horizontal scanning and also an address signal which designates the line address Ay, namely, a line address signal LAS which is incremented one by one at every one horizontal scanning. By these address signals HAS and LAS, the memory 2 is addressed and pattern data is read out one byte by one byte from the address corresponding to the scanning position of the display picture screen.
The pattern data thus read is loaded in parallel one byte by one byte to a shift register 3 and then serially derived one bit by one bit therefrom. The pattern data thus derived is supplied to a CRT display 5. Accordingly, displayed on the screen of the CRT display 5 is a pattern which corresponds to the bit image of the memory 2.
By the way, when such display is carried out, in order to make such displayed pattern easy to see, it is proposed to carry out smoothing (rounding) in, for example, published Japanese patent application No. 41016/1978.
FIG. 2 schematically shows an example of a pattern data of a character "A" written in the pattern memory 2. In this pattern data, the hatched bits represent level "1", while the bits without hatching represent level "0".
FIG. 3 shows the character "A" which is displayed on the screen of the CRT display 5, in which no smoothing is carried out. Reference numerals L.sub.1 to L.sub.14 designate lines (scanning lines) in which the lines shown by solid lines are formed during the odd field periods, while the lines shown by broken lines are formed during the even field periods. Reference letter Du designates a dot having a fundamental size. Since the pattern data (FIG. 2) of the memory 2 is used during both the odd and even field periods, the display pattern becomes as shown in the figure.
On the contrary, when the smoothing is carried out, the character "A" is displayed as shown in FIG. 4, in which a half dot Dh having a width 1/2 the original dot Du is added. Accordingly, as compared with the character "A" which is not subjected to the smoothing as shown in FIG. 3, this character becomes smooth and easy to see.
When this smoothing is carried out, the combination of the half dot Dh with the unit dot Du can exist only in two ways as shown in FIG. 5, and in all patterns, the half dot Dh is added to the unit dot in the combinations shown in FIG. 5. That is, when the two unit dots Du are arranged in the oblique direction, the two
REFERENCES:
patent: 4486856 (1984-12-01), Heckel et al.
patent: 4544922 (1985-10-01), Watanabe et al.
patent: 4546349 (1985-10-01), Prohotsky et al.
Maeda Satoru
Motoki Kazuo
Curtis Marshall M.
Eslinger Lewis H.
Sony Corporation
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