Computer graphics processing and selective visual display system – Plural physical display element control system – Display elements arranged in matrix
Reexamination Certificate
2002-12-17
2004-08-24
Liang, Regina (Department: 2674)
Computer graphics processing and selective visual display system
Plural physical display element control system
Display elements arranged in matrix
C345S068000
Reexamination Certificate
active
06781564
ABSTRACT:
BACKGROUND OF THE INVENTION
The present invention relates to a display apparatus such as a plasma display apparatus. More particularly, the present invention relates to a configuration of a circuit for driving a display unit.
A variety of conventional display apparatuses are known. One of them is a plasma display apparatus. A plasma display apparatus reproduces an image by driving a fluorescent material to emit light in an electrical discharge phenomenon. In a plasma display apparatus, a large screen can be implemented in a small space. Thus, the plasma display apparatus is a future display apparatus which draws attention.
FIG. 2
is a block diagram showing a typical configuration of the conventional plasma display apparatus. In the figure, reference numerals
3
and
8
denote a plasma display panel and a first-electrode drive circuit respectively. Reference numeral
27
denotes a drive circuit whereas reference numerals
25
and
26
each denote a power MOSFET. A symbol X denotes a first electrode or an X electrode common to the power MOSFETs
25
and
26
. A sustain power supply is connected to a terminal
7
. Reference numeral
10
denotes an address drive circuit. Symbols A
1
to AN each denote an address electrode. Reference numerals
82
and
33
denote a second-electrode sustain circuit and a drive circuit respectively. Reference numerals
31
and
32
each denote a power MOSFET whereas symbols Y
1
to Yn each denote a second electrode. A sustain power supply of the second electrodes Y
1
to Yn is connected to a terminal
29
. Reference numeral
34
denotes a scan drive circuit which comprises first to nth sustain drive circuits
34
a
to
34
n
. The outputs of the first to nth sustain drive circuits
34
a
to
34
n
are connected to the second electrodes Y
1
to Yn. The scan drive circuit
34
comprises a shift register
36
, logic circuits
35
and
37
, constant-current power supplies
39
and
47
, power MOSFETs
38
,
40
,
42
,
43
,
46
,
48
,
50
and
51
, resistors
41
and
49
as well as diodes
44
,
45
,
52
,
53
and
80
. A scan power supply is connected to a terminal
28
, furnishing power to the scan drive circuit
34
by way of a diode
80
. Reference numeral
11
denotes a waveform control circuit for outputting control signals Dxs, Dad and Dys to a first-electrode drive circuit
8
, an address drive circuit
10
and a second-electrode sustain circuit
82
respectively. The waveform control circuit
11
also supplies a control signal Dscn to the scan drive circuit
34
by way of an insulation circuit
30
. A second drive circuit
81
comprises the second-electrode sustain circuit
82
and the scan drive circuit
34
.
In the plasma display apparatus shown in
FIG. 2
, the scan signal Dscn output by the waveform control circuit
11
is supplied to the shift register
36
employed in the scan drive circuit
34
n
by way of the photo-coupler insulation circuit
30
. The shift register
36
sequentially distributes the scan signal Dscn to the scan drive circuits
34
a
to
34
n
. In the scan drive circuit
34
, scan pulses bases on the scan signal Dscn are sequentially supplied to the second electrodes Y
1
to Yn of the plasma display panel
3
.
The second-electrode sustain circuit
82
generates sustain pulses YS based on the sustain pulses Dys output by the waveform control circuit
11
. The sustain pulses YS are supplied to the second electrodes Y
1
to Yn of the plasma display panel
3
. The sustain pulses YS generated by the second-electrode sustain circuit
82
are also supplied to the second electrodes Y
1
to Yn by way of a common terminal
83
of the scan drive circuit
34
, the diode
45
and the diode
53
.
The address signal Dad generated by the waveform control circuit
11
is supplied to an address drive circuit
10
. The address drive circuit
10
outputs address drive pulses based on the address signal Dad to the address electrodes A
1
to An of the plasma display panel
3
.
The first-electrode drive signal DXS generated by the waveform control circuit
11
is supplied to a first-electrode drive circuit
8
. The first-electrode drive circuit
8
outputs drive pulses based on the first-electrode drive signal DXS to the first electrode X of the plasma display panel
3
. The scan drive circuit
34
is available in the market as a scan drive IC.
A conventional implementation of the plasma display apparatus shown in
FIG. 2
is disclosed in U.S. Pat. No. 5,745,086.
FIG. 10
of this U.S. patent is a block diagram showing a basic circuit for driving the plasma display apparatus.
In the plasma display apparatus shown in
FIG. 2
, the scan drive circuit
34
composing the second-electrode drive circuit and the second-electrode sustain circuit
82
employ circuits independent of each other. For example, the second-electrode drive circuit
34
has a configuration employing a scan drive IC having a circuit configuration shown in
FIG. 2
while the second-electrode sustain circuit
82
has a configuration employing a power module. In addition, since the terminal
83
of the second-electrode sustain circuit
82
is floating off the ground, it is necessary to put the scan signal Dscn in a floating state through the insulation circuit
30
.
Moreover, the circuit scale of the second-electrode drive circuit
34
is larger than the first-electrode drive circuit
8
, resulting a big ratio of the second-electrode drive circuit
34
to the entire circuit of the plasma display apparatus. Accordingly, the second-electrode drive circuit
34
is a problem encountered in an effort made to reduce the size of the plasma display apparatus.
SUMMARY OF THE INVENTION
It is thus an object of the present invention addressing the problems described above to provide a display apparatus having a simple and compact configuration capable of avoiding malfunctions.
In order to achieve the object described above, the present invention provides the following:
1) A display apparatus for displaying an image on a display panel by turning on pixels of said display panel, the display apparatus comprising: said display panel provided with: address electrodes driven by address pulses based on a video input signal; and sustain electrodes crossing said address electrodes and sandwiching electrical discharging units of pixels with said address electrodes and driven by sustain pulses; a sustain-electrode drive circuit for generating said sustain pulses and scan pulses, provided with a common circuit for generating said sustain pulses or said scan pulses in response to an operating state thereof and for supplying said scan pulses and sustain pulses to said sustain electrodes; an address drive circuit for generating and outputting said address pulses; and a control-signal generation circuit for generating a control signal for changing said operating state of said sustain-electrode drive circuit, wherein, in order to display an image on said display panel, an address of a pixel on said display panel is specified by an electric field created between said sustain electrodes and said address electrodes by said scan pulses and said address pulses; a pixel on said display panel at an address specified by an electric field of said sustain electrodes created by said sustain pulses is turned on; and said sustain-electrode drive circuit is used for both specifying said address and turning on said pixel.
2) A display apparatus for displaying an image on a display panel by turning on pixels of said display panel, the display apparatus comprising: said display panel provided with address electrodes and, first and second electrodes parallel to each other crossing said address electrodes and sandwiching electrical discharging units of pixels with said address electrodes; a first-electrode drive circuit for generating first-electrode sustain pulses for driving said first electrodes; a second-electrode drive circuit for generating scan pulses and second-electrode sustain pulses for driving said second electrodes, provided with a common circuit for generating said second-electrode sustain pulses or said scan
Akiyama Noboru
Asami Fumitaka
Hirakawa Hitoshi
Kawada Toyoshi
Kishi Tomokatsu
Antonelli Terry Stout & Kraus LLP
Hitachi , Ltd.
Liang Regina
Nguyen Jennifer T.
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