Display and display driver with on/off power controller used...

Computer graphics processing and selective visual display system – Display driving control circuitry – Display power source

Reissue Patent

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Details

C345S204000, C345S210000, C345S211000, C345S212000, C345S213000, C713S322000, C713S330000, C713S340000, C700S011000, C700S012000

Reissue Patent

active

RE040504

ABSTRACT:
Signal management control units 471-47nof respective scan drivers LSI in an LCD module are cascade-connected and each have the same construction. A detected signal of the signal management control unit 47J is a data signal latch clock LP applied to a terminal CKB1. A detected signal of the signal management control unit 472is a frame start signal SP applied to a terminal CKB2. A detected signal of the signal management control unit 47n is an AC-transforming clock FR applied to a terminal CKBn. The signal management control unit 471includes a signal stop detection circuit 48 serving as a signal detection means for detecting a stop of the detected signal delay circuit 49 processing circuit 51 consisting of a signal delay circuit 49 and a logic circuit 50. When stopping oscillations of, e.g., the frame start signal SP, outputs T1-Tnof the circuit 51 change to an L level. Hence, a display-off signal DF of the LCD module assumes the L level. A liquid crystal panel is forcibly set in a display-off mode. As a result, even if the frame start signal SP is stopped due to some cause, a liquid crystal application voltage is set down to zero. It is, therefore, possible to avoid a liquid crystal DC drive and prevent a deterioration of the liquid crystal.

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