Display

Computer graphics processing and selective visual display system – Plural physical display element control system – Display elements arranged in matrix

Reexamination Certificate

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Details

C345S098000, C345S099000

Reexamination Certificate

active

07420535

ABSTRACT:
A display capable of suppressing reduction of a scanning property is provided. This display comprises a shift register circuit formed by connecting a plurality of first circuit parts each including a first conductivity type first transistor connected to a first potential and turned on in response to a clock signal, a first conductivity type second transistor connected to a second potential and a first conductivity type third transistor, connected between the gate of the first transistor and the second potential, having two gate electrodes electrically connected with each other.

REFERENCES:
patent: 5949271 (1999-09-01), Fujikura
patent: 6891588 (2005-05-01), Kawachi et al.
patent: 2921510 (1999-04-01), None

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