Computer graphics processing and selective visual display system – Plural physical display element control system – Display elements arranged in matrix
Reexamination Certificate
2008-04-08
2008-04-08
Hjerpe, Richard (Department: 2629)
Computer graphics processing and selective visual display system
Plural physical display element control system
Display elements arranged in matrix
C345S099000, C345S100000, C345S204000, C345S205000
Reexamination Certificate
active
10838341
ABSTRACT:
There is provided a display having a shift register circuit which can prevent an increase in power consumption. The display is provide with a shift register circuit including a first circuit part comprising a fourth transistor turned on in response to a first signal to supply a clock signal to a first transistor, and a second circuit part comprising an eighth transistor turned on in response to a second signal by which a period of on state which does not overlap with a period of on state of the fourth transistor can be obtained, to supply the clock signal to a fifth transistor.
REFERENCES:
patent: 2003/0052848 (2003-03-01), Yamaguchi
patent: 1 160 796 (2001-05-01), None
patent: 1 492 074 (2004-06-01), None
patent: 1 160 796 (2001-05-01), None
European Search Report for Corresponding Patent Application No. EP 04 25 2699, May 8, 2006.
Senda Michiru
Yokoyama Ryoichi
Hjerpe Richard
McDermott Will & Emery LLP
Sanyo Electric Co,. Ltd.
Shapiro Leonid
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