Semiconductor device manufacturing: process – Formation of electrically isolated lateral semiconductive... – Grooved and refilled with deposited dielectric material
Reexamination Certificate
1999-02-04
2001-07-10
Fourson, George (Department: 2823)
Semiconductor device manufacturing: process
Formation of electrically isolated lateral semiconductive...
Grooved and refilled with deposited dielectric material
C438S528000, C438S702000
Reexamination Certificate
active
06258695
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention generally relates to semiconductor manufacturing processes and more particularly to silicon semiconductor or nano-machine device manufacturing processes.
2. Background Description
Semiconductor manufacturing processes are complex multi-step processes during which compressive or tensile stresses are formed in crystalline structure of the semiconductor wafers or substrates. Often, crystalline dislocations form in the substrate to relieve these high stresses. These crystalline dislocations can cause junction leakage, enhanced diffusion, metal precipitation sites, and other undesirable effects.
Junction leakage can severely reduce dynamic random access memory (DRAM) retention time. Enhanced diffusion causes what is referred to as bipolar pipes. Metal precipitation sites cause shorted junctions.
U.S. Pat. No. 5,441,901 to Candelaria entitled “Carbon Incorporation in a Bipolar Base for Bandgap Modification” teaches the use of carbon in the base region of a bipolar transistor for the purpose of bandgap modification for improved bipolar device performance. Carbon has been combined with typical semiconductor dopants such as Boron, Phosphorous, Arsenic, etc., and co-implanted in silicon to minimize transient enhanced diffusion (TED) that might otherwise occur upon post implantation annealing. Also, carbon has been combined with these dopants to minimize the formation of end-of-range (EOR) implant dislocations at post implantation annealing.
Co-implantation of carbon in these instances is to prevent implant related dislocation damage, as well as transient enhanced diffusion due to the creation of silicon self-interstitials by the implantation of the dopant species (as well as the carbon itself). The presence of the carbon causes the rapid extinction of the silicon self-interstitials upon recrystallization annealing, thereby preventing the formation of end-of-range dislocations, as well as, transient enhanced diffusion of the implanted dopant species.
FIG. 1
shows dislocations at the corners of oxide filled shallow trenches. These dislocations are due to compressive stresses in the oxide filled trenches that act on the surrounding silicon crystal lattice (external forces). SiO
2
compressive stress creates forces on surrounding silicon causing the creation of dislocations (d) at recessed oxide corners.
Deep carbon implants have been used to act as gettering sites for heavy metal contaminants in semiconductors. Substitutional carbon has been introduced into bipolar and FET SiGe regions to inhibit the formation of dislocations due to crystal lattice stresses. These crystal lattice stresses are caused by the incorporation of substitutional germanium into the silicon crystal lattice. Germanium, unlike carbon, is a larger atom than silicon and, when substituted for silicon in the crystal lattice at a sufficient concentration, it creates compressive stresses that can cause dislocation formation. Substitutional carbon has been included in these devices to relieve intrinsic stresses so as to prevent dislocation formation.
Thus, there is a need for reducing or eliminating external stress to prevent dislocation formation.
SUMMARY OF THE INVENTION
It is therefore a purpose of the present invention to prevent dislocation formation at features formed in a semiconductor layer.
It is yet another purpose of the present invention to prevent dislocation formation caused by external stresses at features formed on a silicon wafer.
The present invention is a method of reducing the effect of extrinsic stresses in an integrated circuit chip. Such extrinsic stresses may be caused by filling trenches with polycrystalline silicon or oxide, silicides, forming silicon nitride spacers or liners, or during oxide birds-beak formation, or at numerous other processing points. At an appropriate point, as each sensitive feature is defined or formed, carbon co-implanted into the silicon wafer at or near the feature.
REFERENCES:
patent: 3622382 (1971-11-01), Brack et al.
patent: 5024723 (1991-06-01), Goesele et al.
patent: 5212101 (1993-05-01), Canham et al.
patent: 6013546 (2000-01-01), Gardner et al.
patent: 6025273 (2000-02-01), Chen et al.
patent: 4-10544 (1992-01-01), None
patent: 4-155829 (1992-05-01), None
patent: 8-288215 (1996-11-01), None
R. Beck et al; Effect of Carbon on Thermal Oxidation . . .; Journ of Elec. Mat. vol. 22, No. 6 pp. 689-694.
R. Yankov et al.; Proximity Gettering of Copper . . .; Nucl. Inst. and Meth in Phy. Res.; B120 1996 pp. 60-63.
S. Isomae et al.; Annealling Behavior of MeV Implanted . . . J. App. Phys. vol. 74, No. 6, Sep. 15, 1993; pp. 3815-3820.
D. Eaglesham et al; Defects in Ion-Implanted Si: . . . Intr. Phys. Conf. Ser. No. 146; Mar. 20, 1995; pp. 451-457.
J. Liefting et al; Time Evolution of Dislocation . . . Mat. Science and Eng. B25 (1994) pp. 60-67.
J. Liefting et al; C Implantation for Suppression . . . Mat. Res. Soc. Symp Proc. vol. 235; 1992 pp. 179-184.
T. Ando et al.; Reduction of P-N Junction . . .; Optoelec. Tech. Res. Lab Japan; pp. 659-666, (Date Unknown).
S. Im, et al.; Reducing Disloation Density . . .; pp. 139-143, (Date Unknown).
T. Simpson et al.; Suppression of Dislocation Formation in Silion . . . publ. Aug. 29, 1995; pp. 37-38.
R. Liefting et al; Improved Device performance by . . . .; IEEE Trans. on Elec. Devices; vol. 41, No. Jan. 1994, pp. 39-44.
L. Lanzerotti, et al; Suppression of Boron Outdiffusino in . . .; IEEE, 1996; IEDM96-249; pp. 45-47.
P. Stolk et al; The Effect of Carbon on Diffusion in Silicon; Mat. Science and Eng. B36 (1996) 275-281.
A. Cacciato et al.; Dislocation Formation and B Transient . . . J. Appl. Phys. 79, (5), Mar. 1, 1996; pp. 2314-2325.
N. Cowern et al; Role of C and B Clusters . . . . Appl. Phys. Lett., vol. 68, No. 8 Feb. 19, 1996; pp. 1150-1152.
P. Stolk et al; Carbon Incorporation in Silicon for Suppressing . . . .; Apply. Phys. Lett 66 (11), Mar. 13, 1995; pp. 1370-1372.
P. Stolk et al; Understanding and Controlling . . . ; Mat. Res. Soc. Symp. Proc. vol. 354; 1995; pp. 307-318.
C. Chang et al; The Effect of Carbon on the Valence . . .; Appl. Phys. Lett. No. 70 (12) Mar. 24, 1997 pp. 1557-1559.
M. Antonelli et al; The Effects of Rapid Recrystallization . . . Mat. Res. Soc. Symp. Proc. vol. 379, pp. 453-459, 1995.
Dunn James
Geiss Peter
St. onge Stephen
Fourson George
International Business Machines - Corporation
McGuireWoods LLP
Sabo William D.
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