Disk controller includes cache memory and a local processor whic

Details Disk controller includes cache memory and a local processor whic Disk controller includes cache memory and a local processor whic

1989-06-05

1992-07-21

Lee, Thomas C.

Boots, shoes, and leggings

364DIG1, 364DIG2, 3642384, 36424341, 364260, 3642617, 3642631, 3649633, 3649643, G06F 1310

Patent

active

051330601

ABSTRACT:
A controller (10) for use with a hard disk (38) or other mass storage medium provides a memory cache (36). A block descriptor table (40 ) is divided into a plurality of sets (42), depending upon the size of the memory cache (36). Each set is similarly indexed to define memory groups (44) having tag, cache address, and usage information. Upon a read command, an index is generated corresponding to the address requested by the host computer, and the tag information is matched with a generated tag from the address. Each set is checked until a hit occurs or a miss occurs in every set. After each miss, the usage information (50) corresponding to the memory group (44) is decremented. When reading information from the storage device (32) to the memory cache (36), the controller (10) may selectively read additional sectors. The number of sectors read from the storage device may be selectively controlled by the user or the host processor. Further, a cap may be provided to provide a maximum number of sectors to be read.

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patent: 4928239 (1990-05-01), Baum et al.
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