Coded data generation or conversion – Sample and hold
Reexamination Certificate
2011-08-23
2011-08-23
JeanPierre, Peguy (Department: 2819)
Coded data generation or conversion
Sample and hold
C341S143000
Reexamination Certificate
active
08004435
ABSTRACT:
To reduce a random noise power included in an analog input signal, a discrete-time circuit samples an inputted analog signal a plurality of number of times at different times respectively and performs averaging processing on sampling results, thus enabling to respond appropriately even if an input signal has a high frequency without increasing a size of the circuit.
REFERENCES:
patent: 5731774 (1998-03-01), Fujii et al.
patent: 6937174 (2005-08-01), Higashi et al.
patent: 7015842 (2006-03-01), Gupta et al.
patent: 7113117 (2006-09-01), Pentakota et al.
patent: 7132965 (2006-11-01), Gupta et al.
patent: 7733252 (2010-06-01), Nee et al.
patent: 05-235761 (1993-09-01), None
Ishii Hirotomo
Waki Naoya
Jean-Pierre Peguy
Kabushiki Kaisha Toshiba
Turocy & Watson LLP
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