Discrete cosine transformation processor

Details Discrete cosine transformation processor Discrete cosine transformation processor

1992-12-28

1994-07-19

Mai, Tan V.

Boots, shoes, and leggings

G06F 738

Patent

active

053315847

ABSTRACT:
A discrete cosine transformation processor subjects a plurality of input data to addition or subtraction at an adder/subtracter with two combinations according to the control signal every clock pulse so as to output a plurality of combination data. The combination data are assigned to eight groups according to certain combinations and each of them is input to one of eight selection circuits. The selection circuit selects one data from the combination input data according to the control signal and outputs the selected data every clock pulse. A multiplier receives the data selected by the selection circuit and multiplies it by a predetermined coefficient every clock pulse. Further, a second adder/subtracter subjects the output data from the multiplier to addition or subtraction in different combinations according to the control signal to determine cosine transformation coefficient to inverse cosine transformation coefficients.

REFERENCES:
patent: 4385363 (1983-05-01), Widergren et al.
patent: 4510578 (1985-04-01), Miyaguchi et al.
patent: 4899300 (1990-02-01), Jutand et al.

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