Electric lamp and discharge devices – With gas or vapor – Three or more electrode discharge device
Reexamination Certificate
1998-06-04
2001-05-29
Patel, Vip (Department: 2879)
Electric lamp and discharge devices
With gas or vapor
Three or more electrode discharge device
C313S292000
Reexamination Certificate
active
06239551
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to a plasma display panel (referred to hereinafter as PDP) and, more particularly, to a discharge space structure of a PDP and method of fabricating its barrier, in which the center of each discharge space formed by barriers has a height different from that of the boundary between discharge spaces adjacent to each other, to prevent undesirable discharge from occurring in neighboring cells when address discharge between a sustain electrode and address electrode is carried out.
2. Discussion of Related Art
FIG. 1
shows a structure of a conventional three-electrode plane discharge PDP. Referring to
FIG. 1
, the PDP is composed of the front substrate
1
for displaying pictures and back substrate
2
arranged in parallel with the front substrate
1
, having a specific distance from each other. The front substrate
1
has a plurality of sustain electrode lines
6
in a certain interval, a dielectric layer
8
formed on a plurality of sustain electrode lines
6
to restrict discharge current, and a protective layer
9
formed on dielectric layer
8
to protect sustain electrode lines
6
. The back substrate
2
has a plurality of barriers
3
for forming a plurality of discharge spaces, a plurality of address electrode lines
4
formed between barriers
3
, perpendicular to sustain electrode lines
6
, and a fluorescent layer
5
formed on both sides of barriers
3
so as to cover address electrode lines
4
, to emit a visible ray during discharge.
FIG. 2
is a cross-sectional view showing the combination of the front and back substrates of
FIG. 1. A
process of displaying a picture using cells in the conventional PDP constructed as above is explained below. First of all, when a preliminary discharge voltage is applied to corresponding sustain electrode lines
6
, preliminary discharge occurs between sustain electrode lines
6
to allow the following address discharge to occur stably. When an address discharge voltage is supplied to the sustain electrode line
6
and corresponding address electrode line
4
, address discharge is carried out between them. That is, an electric field is created inside the cell to accelerate electrons in a discharge gas, and neutral particles in the gas collide with the accelerated electrons to be ionized into electrons and ions. The neutral particles' collision with the ionized electrons is repeated so that the neutral particles are ionized into electrons and ions rapidly. By doing so, the discharge gas is transformed into a plasma state, and simultaneously vacuum ultraviolet rays are generated.
The vacuum ultraviolet rays excite fluorescent layer
5
, to generate a visible ray. When this visible ray is externally emitted through front substrate
1
, radiation of a cell, and thereby display of a picture, can be externally recognized. Thereafter, when a sustain discharge voltage of above 150V is supplied to corresponding sustain electrode lines
6
, sustain discharge occurs between them, maintaining radiation of each cell for a certain period of time.
A process of forming discharge space in the conventional PDP is described below with reference to
FIGS. 2 and 3
. First of all, address electrodes
4
are formed on back substrate
2
, and barriers
3
for preventing undesirable discharge from generating in neighboring discharge regions are formed between address electrodes
4
. Front and back substrates
1
and
2
are combined using frit glass (not shown). A discharge gas is put into the discharge space formed inside the combined substrates, and then the combined substrates are sealed. Barrier
3
is conventionally formed in such a manner that a dielectric layer is formed and multi level printed in a certain pattern using a screen mask. The height of barrier
3
is conventionally approximately 100 to 150 &mgr;m. To obtain this height, it is required that the dielectric layer is sequentially laminated ten times and printed, and the minimum width of such a barrier is about 50 to 60 &mgr;m.
There is another method of forming the barrier, in which a barrier material is coated on the entire surface of the substrate, a mask layer is formed, and the barrier material layer is etched to form the barrier. The etching may be carried out through wet etching method using an etchant and dry etching method using an abrasive. A method of forming the barrier through the dry etching which is also called sand blast is explained below with reference to FIG.
4
. Address electrodes
4
are formed on back substrate
2
, a barrier material
10
is coated on the substrate including address electrodes
4
by 50 to 80 &mgr;m and dried, and a dry film
11
is laminated thereon. Dry film
11
is exposed by ultraviolet rays, covered with a mask, and developed to form a pattern. Then, barrier material layer
10
is etched by sand blast using the pattern as a mask, to form a barrier shape
10
. The etching is carried out in such a manner that the barrier material layer is etched in an exfoliating solution for 100 to 300 sec, cleaned, and fired in a furnace at 200 to 500° C. for 20 to 60 min, thereby forming barriers
10
. After the formation of barriers
10
, dry film
11
is removed and the fluorescent layer is printed between the barriers.
In the conventional discharge space structure fabricated through the above-described process, all the centers of the discharge spaces and the boundary between neighboring discharge spaces have approximately the same height, as shown in FIG.
3
. That is, the barriers and address electrodes are formed in parallel with each other. Accordingly, plasma can be easily diffused between cells which vertically lie adjacent to each other, and thus visible rays generated by the fluorescent layer intrude into each other in the same stripe during ultraviolet rays discharge, creating color spread. This deteriorates color purity.
SUMMARY OF THE INVENTION
Accordingly, the present invention is directed to a discharge space structure of a PDP and method of fabricating its barrier that substantially obviates one or more of the problems due to limitations and disadvantages of the related art.
An object of the present invention is to provide a discharge space structure of a PDP and method of fabricating its barrier, in which the center region of each discharge space formed by barriers has the height different from that of the boundary region between discharge spaces adjacent to each other, so as to prevent undesirable discharge from occurring in neighboring cells, to remove color spread in the same stripe during address discharge between a sustain electrode and an address electrode, and to effectively use a generated visible ray.
To accomplish the object of the present invention, there is provided a discharge space structure of a plasma display panel including first and second substrates opposite each other, a barrier layer formed on the first substrate and having a plurality of raised portions, and a plurality of discharge spaces, each space being formed between the barrier layer and the second substrate, and being at least partially defined by at least two adjacent raised portions of the barrier layer.
A method of making the barrier layer of the plasma display device includes coating a barrier material layer on a substrate, forming a photosensitive layer on the barrier material layer, exposing the photosensitive layer to light through a mask, the mask having a pattern corresponding to cells of the plasma display device, and etching the barrier material layer to form said plurality of cells.
It is to be understood that both the foregoing general description and the following detailed description are exemplary and explanatory and are intended to provide further explanation of the invention as claimed.
REFERENCES:
patent: 5032768 (1991-07-01), Lee et al.
patent: 5682081 (1997-10-01), Reynolds
patent: 5723945 (1998-03-01), Schermerhorn
patent: 5770921 (1998-06-01), Aoki et al.
Finnegan Henderson Farabow Garrett & Dunner L.L.P.
LG Electronics Inc.
Patel Vip
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