Electric lamp and discharge devices: systems – Periodic switch in the supply circuit – Impedance or current regulator in the supply circuit
Reexamination Certificate
1999-06-16
2001-02-27
Wong, Don (Department: 2821)
Electric lamp and discharge devices: systems
Periodic switch in the supply circuit
Impedance or current regulator in the supply circuit
C315S307000, C315S360000, C315SDIG004
Reexamination Certificate
active
06194841
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Technical Field
The present invention relates to a discharge lamp lighting device for lighting a discharge lamp by high-frequency power generated by an inverter, and particularly to a discharge lamp lighting device having a simple configuration for performing dim control for a discharge lamp stably.
2. Background Art
Here, inspection will be made upon a conventional discharge lamp lighting device.
FIG. 12
is a circuit diagram of a conventional discharge lamp lighting device, and
FIG. 13
is a high-frequency voltage waveform diagram. In
FIG. 12
, the reference symbol E designates a DC power supply; IV, an inverter for inverting a DC voltage into a high-frequency voltage; LA, a discharge lamp having preheating electrodes F
1
and F
2
; T, a ballast choke for limiting a discharge lamp current of the discharge lamp LA; C
5
, a coupling capacitor connected between the ballast choke T and the preheating electrode F
2
; C
6
, a starting capacitor connected between both the terminals of the discharge lamp LA; and FB, a feedback circuit for controlling the oscillation frequency so as to keep the output in a set value.
Next, the circuit configuration of the inverter IV will be described. Q
2
and Q
3
designate MOS FETs which are switching elements. In the MOS FET Q
2
, the drain is connected to the DC power supply, the source is connected to the drain of the MOS FET Q
3
, and the gate is connected to a pin
2
of an IV control integrated circuit IC
2
which will be described later. In the MOS FET Q
3
, the source is connected to the DC power supply E through a detection resistor R
6
, and the gate is connected to a pin
4
of the IV control integrated circuit IC
2
.
The reference symbol R
1
designates a starting resistor connected to the DC power supply E; C
3
, a control power capacitor connected between the starting resistor R
1
and the earth; DZ, a voltage regulating diode for stabilizing the voltage of the control capacitor C
3
; IC
2
, an IV control integrated circuit for controlling the inverter IV. In the IV control integrated circuit IC
2
, the reference numeral
1
designates a power supply input terminal connected to a junction point between the control power capacitor C
3
and the starting resistor R
1
;
2
and
4
, voltage output terminals from which driving voltages for the MOS FET Q
2
and Q
3
are outputted;
3
, a reference voltage output terminal;
6
, a current output terminal (main oscillation resistor connection terminal) from which a current for determining resonance frequency is outputted; and
7
, a current input/output terminal for charging/discharging a capacitor C
4
.
The description will be made below about the configuration of the feedback circuit FB. The feedback circuit FB is constituted by: resistors R
2
and R
3
for determining a current flowing out of the voltage output terminal
6
; a capacitor C
4
connected to the current input/output terminal
7
; the source resistor or detection resistor R
6
for detecting a high-frequency voltage flowing into the discharge lamp LA; an integrating circuit IN constituted by a resistor R
5
and a capacitor C
8
for averaging the high-frequency voltage detected by the detection resistor R
6
; and an error amplifier EA. The error amplifier EA is constituted by an operational amplifier IC
3
and voltage dividing resistors R
9
and R
10
which are connected in series between the negative electrode of the power supply E and the junction point between the resistor R
1
and the capacitor C
3
. The operational amplifier circuit IC
3
is arranged such that the non-inverted input terminal thereof is connected to a reference voltage from the junction point between the resistors R
9
and R
10
, while the inverted input terminal thereof is connected to a series connection of a capacitor
2
, a diode D
5
and the resistor R
3
connected to the current output terminal
6
of the IV control integrated circuit IC
2
, thereby making the output voltage of the integrating circuit IN equal to the reference voltage.
Next, description will be made about the operation of the conventional discharge lamp lighting device with reference to
FIGS. 12 and 13
.
FIG. 13
is a waveform diagram of a high-frequency voltage flowing into the discharge lamp LA when the discharge lamp is lighted.
First, the operation of the inverter circuit IV will be described. When the DC power supply E is turned on, a driving current flows in a closed loop of the power supply E the starting resistor R
1
, the control power capacitor C
3
, and to the power supply E, so that the control power capacitor C
3
is charged. The voltage of the control power capacitor C
3
is applied to the pin
1
of the IV control integrated circuit IC
2
. When the voltage of the control power capacitor C
3
increases and reaches the working voltage of the IV control integrated circuit IC
2
, the IV control integrated circuit IC
2
begins oscillation. With this oscillation, a high-frequency voltage is applied to the gate of the MOS FET Q
2
of the half-bridge inverter circuit IV from the pin
2
of the IV control integrated circuit IC
2
, so that the MOS FET Q
2
is turned ON. In addition, a low-frequency voltage is applied to the MOS FET Q
3
from the pin
4
of the IV control integrated circuit IC
2
. Accordingly, the MOS FET Q
2
and the MOS FET Q
3
perform on-off operation alternately, so that the inverter circuit IV oscillates with a high frequency.
Consequently, a current flows alternately, in a closed loop, from the power supply E, to the preheating electrode F
1
, to the starting capacitor C
6
, to the preheating electrode F
2
, to the coupling capacitor C
5
, to the ballast choke T, to the MOS FET Q
3
, to the detection resistor R
6
, to the power supply E when the MOS FET Q
3
is on, while, in the closed loop, from the coupling capacitor C
5
, to the preheating electrode F
2
, to the starting capacitor C
6
, to the preheating electrode F
1
, to the MOS FET Q
2
, to the ballast choke T, and to the coupling capacitor C
5
when the MOS FET Q
2
is on, so that a high-frequency current flows in a series circuit of the ballast choke T, the coupling capacitor C
5
, the preheating electrode F
2
, the starting capacitor C
6
, and the preheating electrode F
1
.
At this time, there is a relation that the capacitance value of the coupling capacitor C
5
is sufficiently larger than the capacitance value of the starting capacitor C
6
. Accordingly, a high-frequency high voltage is generated in the starting capacitor C
6
by the LC series resonance of the ballast choke T and the starting capacitor C
6
. This high-frequency high voltage is applied to the discharge lamp LA, so that the discharge lamp LA is lighted.
On the other hand, at this time, the high-frequency voltage generated in the detection resistor R
6
is averaged by the integrating circuit IN of the feedback circuit FB, and this DC voltage is inputted into the inverted input terminal of the operational amplifier IC
3
of the error amplifier EA. Then, the oscillation frequency of the IV control integrated circuit IC
2
is determined by the capacitance value of the capacitor C
4
and the value of a current flowing out to the resistors R
2
and R
3
from the current output terminal
6
of the IV control integrated circuit IC
2
. The larger this current value is, the higher the oscillation frequency becomes.
The current flowing into the resistor R
3
from the current output terminal
6
changes in accordance with a change of the output voltage of the operational amplifier IC
3
, so that the oscillation frequency of the IV control integrated circuit IC
2
is controlled.
Therefore, the oscillation frequency of the IV control integrated circuit IC
2
is controlled by controlling the output voltage of the operational amplifier IC
3
so that the output voltage of the integrating circuit IN is made equal to the reference voltage of the non-inverted input terminal of the operational amplifier IC
3
. As a result, the average value of the high-frequency current flowing in the detection resistor R
6
, that is
Hamazaki Kenji
Kobayashi Tetuya
Maeda Tadashi
Masatika Isao
Nishikawa Hiroaki
Mitsubishi Denki & Kabushiki Kaisha
Oblon & Spivak, McClelland, Maier & Neustadt P.C.
Tran Thuy Vinh
Wong Don
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