Patent
1995-05-05
1997-10-21
Chan, Eddie P.
395468, 395451, G06F 1208
Patent
active
056805764
ABSTRACT:
A multiprocessor system having a plurality of requestors, a memory and memory directory controller employing directory-based coherence. The system implements a method to detect dropping of clean-exclusive data. Only one intervention message is permitted to target an exclusive object held by a first requestor, wherein the intervention message is caused by a second requestor. The system detects whether the first requestor has an outstanding writeback for the object targeted by the intervention message, as well as whether the first requestor has a clean-exclusive, dirty-exclusive or invalid copy of the object targeted by the intervention message. A clean-exclusive copy of the object has been dropped when no outstanding writeback is detected and the first requestor has the object in the invalid state.
REFERENCES:
W.C. Yen et al., "Coherence Problem in a Multicache System," IEEE, pp. 332-339, 1982.
Mark S. Papamarcos et al., "A Low Overhead Coherence Solution for Multiprocessors with Private Cache Memories," Proc. of the 11th Annual Intl. Symp. on Computer Arch., pp. 348-354, Jun. 1984.
Daniel Lenoski et al., "The Directory-Based Cache Coherence Protocol for the DASH Multiprocessor," IEEE, pp. 148-159, 1990.
David Chaiken et al., "Limitless Directories: A Scalable Cache Coherence Scheme," ACM, pp. 224-234, 1991.
Daniel Lenoski et al., "The Stanford Dash Multiprocessor," IEEE, pp. 63-79, Mar. 1992.
Tony Brewer, "A Highly Scalable System Utilizing up to 128 PA-RISC Processors," IEEE, pp. 133-140, 1995.
Chan Eddie P.
Ellis Kevin L.
Silicon Graphics Inc.
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