Directed auto-refresh for a dynamic random access memory

Static information storage and retrieval – Addressing – Including particular address buffer or latch circuit...

Reexamination Certificate

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Details

C365S222000, C365S230030, C365S189040, C365S233100

Reexamination Certificate

active

07433261

ABSTRACT:
A memory includes a row address latch. The row address latch includes a first stage configured to latch a row address for a memory read or write operation, and a second stage configured to latch a row address for a memory bank auto-refresh. The row address latch provides the row address from the first stage in response to an activate command and provides the row address from the second stage in response to a directed auto-refresh command.

REFERENCES:
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patent: 5999472 (1999-12-01), Sakurai
patent: 6233195 (2001-05-01), Yamazaki et al.
patent: 6363024 (2002-03-01), Fibranz
patent: 6570803 (2003-05-01), Kyung
patent: 6771553 (2004-08-01), Cowles et al.
patent: 6859407 (2005-02-01), Suh
patent: 10-2003-0001710 (2003-08-01), None
“Corresponding Korean patent application Notice of Allowance issued on Apr. 15, 2008.”.

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