Fishing – trapping – and vermin destroying
Patent
1994-05-09
1995-04-18
Hearn, Brian E.
Fishing, trapping, and vermin destroying
437 62, 437974, 148DIG12, 148DIG135, H01L 2176
Patent
active
054078563
DESCRIPTION:
BRIEF SUMMARY
TECHNICAL FIELD
The present invention relates to a process for producing solid, surface bonding between two wafer plates of which at least one is composed of a semiconducting material, e.g. silicon.
STATE OF THE ART
In microstructure technology it is advantageous in the fabrication of complex microsystems, as by way of illustration sensors, actuators including microelectronic circuits, to join, for production reasons, separately fabricated and processed wafer plates of the same or different material permanently via the surface to a complex microsystem.
The fabrication of a sequence of layers, by way of illustration, with an epitactic process has noteably the drawback that the partly very complex and expensive epitaxy facilities require high investment costs. In comparison, the fabrication of semiconductor layer sequences using joining techniques is a less expensive alternative.
The state of the art joining techniques for wafer plates have, however, to some degree a number of different disadvantages:
In the state of the art direct substrate bonding processes, temperatures ranging between 700.degree. C. and 1100.degree. are required for the tempering procedure. Only these high temperatures, namely, yield permanently adhering wafer plates which possess sufficient adhesive power for further processing procedures.
In this connection, reference is made, by way of illustration, to EP-A-O 136 050 in which it is explicitly said that the "adhering" silicon wafers do not attain the necessary adhesive force until temperatures higher than 600.degree. C.
Furthermore, from U.S. Pat. No. 4,883,215 a joining technique is known which functions similar to the so-called "bursting" of glass elements. With this joining techniques, not only silicon wafer plates but also wafer plates of silicon and insulation material, such as e.g. glass or semiconducting oxides can be joined.
Although no tempering procedures at high temperatures are required in this bonding technique, the adhesive force between the plates is, however, not sufficient for a number of individual cases. Furthermore, from U.S. Pat. No. 4,962,062, a process for joining two semiconductor wafer plates by means of an intermediate layer is known. In this state of the art process it is, however, necessary to introduce in at least one surface a special recess through which the adhesion is only then imparted. Moreover, this process also requires tempering procedures at temperatures between approximately 500.degree. C. and 1200.degree. C.
Thus, due to high process temperatures and special preparation of the wafer surfaces, this state of the art process permits joining wafer plates already possessing microelectronic surface structures, so-called processed wafer plates only with difficulty, for usually the maximum temperature with which the processed standard silicon substrate can be processed further is 420.degree. C.
These low temperatures as tempering temperatures are according to the state of the art only then sufficient if the bonding processes are applied which use glass as the substrate material or as an intermediate layer:
In the so-called anodic bonding process, pyrex glass is bonded as the substrate material at 300.degree. C. to a silicon wafer by means of the application of a strong electric field. The drawback here is the necessary confinement to the pyrex glass as the substrate material due to which many processes are prohibited (e.g. anistropic etching, electro-chemical etching stops) compared to the use of silicon.
Furthermore, it is known that in order to join two silicon substrates, a glass layer can be utilized as the intermediate layer, which may be composed of, by way of illustration pyrex or lead glass layers (thickness, approx. 0.5 to 5 .mu.m) which are applied to one of the two wafers by means of sputtering.
On the other hand, borosilicate glasses, either fabricated by means of CVD processes or by doping, are also applied in bonding technology by pressing onto the uncoated wafer at about 460.degree. C.
The problem with this process is the high process
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Benecke Wolfgang
Quenzer Hans J.
Dang Trung
Fraunhofer Gesellschaft zur Forderung der angewandten Forschung
Hearn Brian E.
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