Multiplex communications – Pathfinding or routing – Switching a message which includes an address header
Reexamination Certificate
2011-04-19
2011-04-19
Patel, Jayanti K (Department: 2465)
Multiplex communications
Pathfinding or routing
Switching a message which includes an address header
C370S412000, C709S245000, C711S200000
Reexamination Certificate
active
07929526
ABSTRACT:
A system and method for sending a cache line of data in a single message is described. An instruction issued by a processor in a multiprocessor system includes an address of a message payload and an address of a destination. Each address is translated to a physical address and sent to a scalability interface associated with the processor and in communication with a system interconnect. Upon translation the payload of the instruction is written to the scalability interface and thereafter communicated to the destination. According to one embodiment, the translation of the payload address is accomplished by the processor while in another embodiment the translation occurs at the scalability interface.
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Koka Pranay
Kroeger Robert J.
O'Krafka Brian W.
Dierenbach Karl A.
Hassan Saad
Lembke Kent A.
Marsh & Fischmann & Breyfogle LLP
Oracle America Inc.
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