Patent
1993-04-20
1997-06-10
Kim, Matthew M.
395833, 395894, 395282, 39520007, G06F 1200, G06F 1328
Patent
active
056385307
ABSTRACT:
A method and system are provided for improved processing between a host computer (200) and process logic (170). Data instructions are stored at multiple memory locations of a memory (150). The data are processed in response to instructions by the process logic (170), which is integrated with the memory (150) within a single integrated circuit. The memory locations are directly accessible without bus arbitration by the external device coupled to the single integrated circuit through an external interface (180), which controls the processing speed of the process logic (170).
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Chirayil Rajan
Frantz Gene A.
Pawate Basavaraj I.
Brady III W. James
Donaldson Richard L.
Kim Matthew M.
Swayze, Jr. W. Daniel
Texas Instruments Incorporated
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