Direct memory access (DMA) request controlling arrangement inclu

Details Direct memory access (DMA) request controlling arrangement inclu Direct memory access (DMA) request controlling arrangement inclu

1991-01-29

1993-10-12

Gossage, Glenn

Boots, shoes, and leggings

395550, 3642409, 3642423, 36424231, 364271, 364DIG1, G06F 1328, G06F 1342

Patent

active

052533565

ABSTRACT:
A direct memory access (DMA) request control arrangement controls a DMA request signal produced by a peripheral device and produces a DMA acknowledgement signal to deliver the acknowledgement signal to the peripheral device. The DMA request control arrangement includes a first sample-and-hold circuit which samples the request signal into a first sampled signal in synchronism with clock pulses and holds the first sampled signal as a first held signal. A second sample-and-hold circuit samples the first held signal into a second sampled signal in synchronism with the clock pulses and holds the second sampled signal as the DMA acknowledgement signal. A detecting circuit detects a time instant at which the request signal changes to a nonrequest level after the acknowledgement signal has reached an acknowledged level and thereby produces a detection signal. An end signal producer produces an end signal representative of an end of direct transfer between the peripheral device and a memory in response to one of the clock pulses that is generated immediately after reception of the detection signal. The second sample-and-hold circuit makes the acknowledgement signal have a nonacknowledged level in response to a different one of the clock pulses that is generated immediately after reception of the end signal.

REFERENCES:
patent: 4414664 (1983-11-01), Greenwood
patent: 4417304 (1983-11-01), Dinwiddie, Jr.
patent: 4428044 (1984-01-01), Liron
patent: 4558412 (1985-12-01), Inoshita et al.
patent: 4611279 (1986-09-01), Andresen et al.
patent: 4811204 (1989-03-01), Fung
"8237A High Performance Programmable DMA Controller", Microprocessor and Peripheral Handbook, vol. I--Microprocessor, Intel manual (Oct., 1987), pp. 2-222 to 2-240.

Affiliated with

Also associated with

Rating

Direct memory access (DMA) request controlling arrangement inclu does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Direct memory access (DMA) request controlling arrangement inclu, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Direct memory access (DMA) request controlling arrangement inclu will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-1912667