Direct memory access controller with interface configured to gen

Details Direct memory access controller with interface configured to gen Direct memory access controller with interface configured to gen

1995-12-29

1998-06-02

Sheikh, Ayaz R.

395848, 395854, 395859, 395287, 395292, 395308, G06F 1328

Patent

active

057615322

ABSTRACT:
A computer system is provided including a local memory, a local bus coupled to the local memory, a peripheral bus and a direct memory access (DMA) controller. The DMA controller performs DMA transfers of data between the local bus and the peripheral bus. The DMA includes a DMA queue for storing data to be transferred and a bus ownership status circuit for determining bus ownership status of the DMA controller. The DMA controller further includes a local bus interface circuit coupled to the DMA queue and to the status circuit for halting the transfer of data from the local bus to the DMA queue without relinquishing DMA ownership over the local bus when the DMA queue is full and the status circuit indicates that the DMA controller has ownership over both the peripheral bus and the local bus.

REFERENCES:
patent: 4989135 (1991-01-01), Miki
patent: 5182800 (1993-01-01), Farrell et al.
patent: 5404522 (1995-04-01), Carmon et al.
patent: 5481756 (1996-01-01), Knno
patent: 5548786 (1996-08-01), Amini et al.

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