Direct memory access controller comprising a multi-word data reg

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395427, 395841, 395853, 395872, 395886, 364DIG1, G06F 1300

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active

055949231

ABSTRACT:
A data transfer apparatus includes a register file, a control means, and an operation defining and holding means to execute a DMA transfer of a series of data between devices at a high speed. The data, which are continuously read out from said devices, are once stored in said register file, according to the control by said control means and the information stored in said operation defining register. The data stored in said register file are then continuously transferred into the destination device. As a result, a high speed transfer of a series of data is executed between devices.

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patent: 4797809 (1989-01-01), Sato et al.
patent: 5014186 (1991-05-01), Chisholm
patent: 5077664 (1991-12-01), Taniai et al.
patent: 5276684 (1994-01-01), Pearson

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