Electrical computers and digital processing systems: processing – Processing architecture – Array processor
Reexamination Certificate
2006-08-30
2010-11-09
Petranek, Jacob (Department: 2183)
Electrical computers and digital processing systems: processing
Processing architecture
Array processor
Reexamination Certificate
active
07831801
ABSTRACT:
A direct memory access (“DMA”)-based multi-processor array architecture that may be implemented in a single integrated circuit is described. The integrated circuit includes a plurality of processing units. A first processing unit and a second processing unit of the plurality of processing units are topologically coupled via a first DMA block. The first DMA block includes a first dual-ported random access memory and a first decoder. A multiple-processor array is provided by topologically coupling the first processing unit and the second processing unit via the first direct memory access block.
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George Thomas
King John J.
Petranek Jacob
Webostad W. Eric
Xilinx , Inc.
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