Direct hardware error identification method and apparatus for er

Details Direct hardware error identification method and apparatus for er Direct hardware error identification method and apparatus for er

1988-06-30

1990-05-08

Atkinson, Charles E.

Excavating

364200, 371 161, G06F 1100

Patent

active

049244663

ABSTRACT:
A computer system having trace arrays and registers that provide error tracing that permits retry of operations in a pipelined, multiprocessing environment after the operations have been allowed to quiesce. The trace arrays in each retry domain include one master trace array. The master arrays store an event trace identification code, a cross reference event trace indentification code, an error flag, and a cross reference bit. The trace arrays provide a record of the events occurring between the occurrence of an error and the completion of quiescence, when retry can be attemped. Error registers are used to record events in which errors occur during quiescence, where trace arrays cannot be implemented.

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