Direct digital synthesizer with selectably randomized accumulato

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328 14, H03K 1332

Patent

active

049512374

ABSTRACT:
A direct digital synthesizer (DDS) accumulator circuit is disclosed wherein a selected few of the low order accumulator bits are dithered by a pseudorandom number generator in order to introduce flat frequency deviation density to suppress spurious signals including those close-in to the output or fundamental frequency. The accumulator circuit may advantageously be sectioned into a lower order accumulator and higher order accumulator in a pipelined combination with a sine approximation output circuit in order to construct a DDS circuit wherein such spur suppression is achieved without decreasing system throughput.

REFERENCES:
patent: 4410954 (1983-10-01), Wheatley, III
patent: 4752902 (1988-06-01), Goldberg
patent: 4809205 (1989-02-01), Freeman
patent: 4815018 (1989-03-01), Reinhardt et al.

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