Direct digital synthesis in a QAM demodulator

Demodulators – Phase shift keying or quadrature amplitude demodulator

Reexamination Certificate

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Details

C329S306000, C375S324000, C375S325000, C375S326000, C375S329000

Reexamination Certificate

active

06249179

ABSTRACT:

TECHNICAL FIELD
The present invention relates to a quadrature amplitude modulation (QAM) type demodulator for demodulating signals modulated in accordance with the QAM scheme.
BACKGROUND ART
Quadrature amplitude modulation (QAM) is an intermediate frequency (IF) modulation scheme in which a QAM signal is produced by amplitude modulating two baseband signals, generated independently of each other, with two quadrature carriers, respectively, and adding the resulting signals. The QAM modulation is used to modulate a digital information into a convenient frequency band. This may be to match the spectral band occupied by a signal to the passband of a transmission line, to allow frequency division multiplexing of signals, or to enable signals to be radiated by smaller antennas. QAM has been adopted by the Digital Video Broadcasting (DVB) and Digital Audio Visual Council (DAVIC) and the Multimedia Cable Network System (MCNS) standardization bodies for the transmission of digital TV signals over Coaxial, Hybrid Fiber Coaxial (HFC), and Microwave Multi-port Distribution Wireless Systems (MMDS) TV networks.
The QAM modulation scheme exists with a variable number of levels (4, 16, 32, 64, 128, 256, 512, 1024) which provide 2, 4, 5, 6, 7, 8, 9, and 10 Mbit/s/MHz. This offers up to about 42 Mbit/s (QAM-256) over an American 6 MHz CATV channel, and 56 Mbit/s over an 8 MHz European CATV channel. This represents the equivalent of 10 PAL or SECAM TV channels transmitted over the equivalent bandwidth of a single analog TV program, and approximately 2 to 3 High Definition Television (HDTV) programs. Audio and video streams are digitally encoded and mapped into MPEG2 transport stream packets, consisting of 188 bytes.
The bit stream is decomposed into n bits packets. Each packet is mapped into a QAM symbol represented by two components I and Q, (e.g., n=4 bits are mapped into one 16-QAM symbol, n=8 bits are mapped into one 256-QAM symbol). The I and Q components are filtered and modulated using a sine and a cosine wave (carrier) leading to a unique Radio Frequency (RF) spectrum. The I and Q components are usually represented as a constellation which represents the possible discrete values taken over in-phase and quadrature coordinates. The transmitted signal s(t) is given by:
s
(
t
)=
I
cos(2&pgr;
f
0
t
)−
Q
sin(2&pgr;
f
0
t
),
where f
0
, is the center frequency of the RF signal. I and Q components are usually filtered waveforms using raised cosine filtering at the transmitter and the receiver. Thus, the resulting RF spectrum is centered around f
0
and has a bandwidth of R(1+&agr;), where R is the symbol transmission rate and &agr; is the roll-off factor of the raised cosine filter. The symbol transmission rate is 1

th
of the transmission bit rate, since n bits are mapped to one QAM symbol per time unit 1/R.
In order to recover the baseband signals from the modulated carrier, a demodulator is used at the receiving end of the transmission line. The receiver must control the gain of the input amplifier that receives the signal, recover the symbol frequency of the signal, and recover the carrier frequency of the RF signal. After these main functions, a point is received in the I/Q constellation which is the sum of the transmitted QAM symbol and noise that was added over the transmission. The receiver then carries out a threshold decision based on lines situated at half the distance between QAM symbols in order to decide on the most probable sent QAM symbol. From this symbol, the bits are unmapped using the same mapping as in the modulator. Usually, the bits then go through a forward error decoder which corrects possible erroneous decisions on the actual transmitted QAM symbol. The forward error decoder usually contains a de-interleaver whose role is to spread out errors that could have happened in bursts and would have otherwise have been more difficult to correct.
As noted above, it is necessary for the receiver to recover the sampling frequency of the signal and to recover the carrier frequency of the RF signal. Often times in the prior art, the carrier frequency is recovered after the receive filter. For example, U.S. Pat. No. 5,315,619 to Bhatt describes a carrier recovery system including a time multiplexed processor for compensating for a carrier frequency offset. The carrier recovery system is used in a television signal receiver. In the '619 patent, a direct digital synthesizer is used in the carrier recovery circuit and is located after a bandpass filter unit and a low pass filter unit. The direct digital synthesizer sends back frequency control to an input signal processor located before an analog-to-digital conversion circuit.
In carrier recovery systems that are not purely digital, a voltage controlled oscillator (VCO) is generally required. Having a purely digital carrier recovery eliminates the need for the VCO and provides a better carrier recovery. However, the purely digital carrier recovery systems of the prior art generally recover the signal frequency after the receive filter. One disadvantage that results from a system that recovers the signal frequency after filtering is that the signal has lost its maximum energy level after filtering, resulting in a lower signal gain.
It is an object of the present invention to provide a QAM demodulator having a baseband conversion circuit that has a purely digital carrier recovery process, thus eliminating the need for a voltage controlled oscillator.
It is a further object of the invention to provide a QAM demodulator in which the correct signal frequency is recovered before the receive filter in order to maintain the maximum signal energy before equalization and carrier frequency estimation.
SUMMARY OF THE INVENTION
The above objects have been achieved by a quadrature amplitude modulation (QAM) type demodulator having a pair of direct digital synthesizer (DDS) circuits. The first DDS circuit is located in a baseband conversion circuit before a receive filter and digitally tunes the signal within the receive filter bandwidth. The second DDS circuit is within a carrier recovery circuit located after the receive filter and serves to fine tune the signal phase. The purely digital carrier recovery emulates the presence of a voltage controlled oscillator (VCO), eliminating the need for a VCO to be used, and also provides a better carrier recovery in terms of accuracy and the residual phase noise of the signal. The dual DDS structure is optimal for frequency recovery, since it is done before the receive filter in order to maintain the maximum signal energy, and is also optimal for phase recovery, since the short loop carrier provides for better phase tracking, especially in the case of phase noise on the signal.


REFERENCES:
patent: 5315619 (1994-05-01), Bhatt
patent: 6160443 (2000-12-01), Maalej et al.

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