Direct coupled semiconductor logic circuit

Electrical transmission or interconnection systems – Nonlinear reactor systems – Parametrons

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307443, 307460, 307559, 307561, 307280, H03K 19017, H03K 1912, H03K 333, H03K 508

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active

047527013

ABSTRACT:
In a semiconductor logic circuit, a plurality of gates are provided, each formed of a junction type field effect transistor. The junction type field effect transistor of one of the gates is directly coupled to the junction type field effect transistor of a succeeding gate. An element is provided for clamping an output voltage of the junction type field effect transistor of the one gate, which provides an input voltage for the junction type field effect transistor of the succeeding gate, to below about a forward voltage of a pn junction of the succeeding gate.

REFERENCES:
patent: 3157795 (1964-11-01), Pressman
patent: 3742250 (1973-06-01), Kan
patent: 4129792 (1978-12-01), Kawagai et al.
patent: 4491747 (1985-01-01), Shimizu
8107 IEEE Jnal of Solid-State Circuits, vol. SC-16 (1981) Oct., No. 5, "Silicon MESFET Digital Circuit Techniques" Cornelis D. Hartgring et al, pp. 578-584.
"Electronic Circuit", Fumio Mizuno, No. 54-47471, vol. 3, No. 67 (E-116), Jun. 9, 1979.

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