Direct coupled FET logic using a photodiode for biasing or level

Details Direct coupled FET logic using a photodiode for biasing or level Direct coupled FET logic using a photodiode for biasing or level

1986-11-18

1987-10-20

Miller, Stanley D.

Electrical transmission or interconnection systems

Nonlinear reactor systems

Parametrons

307446, 307448, 307450, 307475, 307264, 307296R, 307311, 250212, 136293, 357 19, 357 22, 357 29, H03K 1713, H03K 17687, H03K 1778

Patent

active

047016469

ABSTRACT:
A direct coupled FET logic (DCFL) circuit element has an active FET with source connected to a low reference voltage and drain connected through a pull-up FET to a higher reference voltage. An input is applied to the gate of the active FET and the output is taken from its drain, the pull-up FET having its gate connected to its source. In depletion mode configuration, a photodiode is connected to the gate of the active FET, the photodiode energizable to downwardly shift the gate voltage. In enhancement mode configuration, a photodiode is connected between source and gate of the pull-up transistor and is energized to shift the gate voltage upwardly. The photodiodes are integrated with the active and pull-up FETs and are energized by light or decay radiation.

REFERENCES:
patent: 3031519 (1962-04-01), Silverman
patent: 3860863 (1975-01-01), Lamprecht
patent: 4295058 (1981-10-01), Lade et al.
patent: 4400636 (1983-08-01), Andrade
patent: 4450369 (1984-05-01), Schuermeyer
patent: 4459498 (1984-07-01), Stengl et al.
patent: 4485316 (1984-11-01), Nuzillat et al.
patent: 4517581 (1985-05-01), Thompson
patent: 4605943 (1986-08-01), Nakamura et al.
patent: 4631426 (1986-12-01), Nelson et al.
patent: 4665316 (1987-05-01), Hodges
Miura et al., "Optoelectronic Integrated AlGaAs/GaAs P-I-N/Field-Effect Transistor with an Embedded, Planar P-I-N Photodiode," Applied Physics Letters, May 1986, pp. 1461-1463.
Van Tuyl et al., "High-Speed Integrated Logic with GaAs MESFETs", IEEE JSSC, vol. SC-9, No. 5, Oct. 1974, pp. 269-276.

Affiliated with

Also associated with

Rating

Direct coupled FET logic using a photodiode for biasing or level does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Direct coupled FET logic using a photodiode for biasing or level, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Direct coupled FET logic using a photodiode for biasing or level will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-1614186