Active solid-state devices (e.g. – transistors – solid-state diode – Housing or package – Multiple housings
Reexamination Certificate
1999-03-01
2001-06-26
Graybill, David E. (Department: 2814)
Active solid-state devices (e.g., transistors, solid-state diode
Housing or package
Multiple housings
C257S777000
Reexamination Certificate
active
06252300
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to a wafer structure. More particularly, the present invention relates to a direct contact through hole type wafer structure.
2. Description of the Related Art
A trend for electrical products is to be light, short, small and thin. Not only the chips manufacturing technology but also the packaging, technology is developed rapidly to meet the trend. Since a width of a chip is reduced quickly, an integration of the chip is increased and a volume of a chip is decreased. As a result, it is an important task to develop a new packaging technology, which is able to form a small volume package.
Memory modules, for example, are the common semiconductor products. The memory modules are generally formed by the following steps. Chips are first packaged, and then the packages are attached to a printed circuit board. The steps of forming the memory modules are complicated and manufacturing costs are high. Additionally, the arrangement of the packages on the printed circuit board is two-dimensional. An area occupied by the packages is large, so that the packaging density is low. To further reduce reduction of a size of the memory module is limited.
A stacked-type package structure is designed to overcome the above problems. The package structure is three-dimensional, thus an area occupied by packages is reduced and the packaging density is increased.
FIG. 1
is a schematic, cross-sectional diagram of a conventional stacked-type package structure.
Referring to
FIG. 1
, chips
10
a
,
10
b
and
10
c
are coupled with leadframes
14
a
,
14
b
and
14
c
by bonding wires
12
, respectively. The chips
10
a
,
10
b
,
10
c
and the leadframes
14
a
,
14
b
,
14
c
are sealed by epoxy
16
to form packages
18
a
,
18
b
and
18
c
. The packages
18
a
,
18
b
,
18
c
are stacked and coupled with each other by outer leads of the leadframes
14
a
,
14
b
,
14
c
. Outer leads of the leadframe
14
c
couple with contacts
22
on a printed circuit board
20
by tape automatic bonding.
Although the stacked-type package structure reduces the area occupied by the packages, a height of the stacked-type package structure is high. Furthermore, a signal-transmitting path from the stacked-type package structure to the printed circuit board is long, so that electrical impedance is increased. As a result, signals transmitted decay and are delayed.
SUMMARY OF THE INVENTION
Accordingly, the present invention provides a direct contact through hole type wafer structure that has contacts on both sides.
The invention provides a direct contact through hole type wafer structure that is used to form a wafer-level package, so that a volume and a height of the package are reduced.
The invention provides a direct contact through hole type wafer structure used to form a package, so that a signal transmitting path and electrical impedance of the package are reduced.
To achieve these and other advantages and in accordance with the purpose of the invention, as embodied and broadly described herein, the invention provides a three-dimensional stacked-type package structure. Both sides of a wafer have devices and contacts. The contacts are coupled with the devices. Bumps are formed on the contacts, respectively.
Because a package structure provided according to the invention is a wafer-level package, a volume and a height of the package are reduced. Additionally, the signal-transmitting path is reduced. The electrical impedance is also reduced, so that the problem of signals delayed and decayed is avoided.
It is to be understood that both the foregoing general description and the following detailed description are exemplary, and are intended to provide further explanation of the invention as claimed.
REFERENCES:
patent: 5426072 (1995-06-01), Finnila
patent: 5587341 (1996-12-01), Masayuki et al.
patent: 6080264 (1995-06-01), Ball
Han Charlie
Hsuan Min-Chih
Graybill David E.
United Microelectronics Corp.
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