Direct and indirect addressing in an electronic digital calculat

Registers – Transfer mechanism – Traveling pawl

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3401725, G06F 920, G06F 1502

Patent

active

039671046

ABSTRACT:
A greatly simplified calculator circuit implemented, for example, utilizing I.sup.2 L technology, is fabricated on a relatively small semiconductor chip resulting in high yield. A unique feature of such calculator which permits direct or indirect addressing while reducing the number of ROM instructions required and hence the size of the ROM to permit fabrication on the smaller chip is embodied in the present invention. All memory instructions contain an address select bit to choose either the address contained in the ROM instruction word or the contents of the RAM address register which is loaded from the adder output. The RAM address register contents are incremented or added to by the adder to provide indirect addressing of the RAM while the ROM instruction word provides direct addressing of the RAM.

REFERENCES:
patent: 3364471 (1968-01-01), Bienhoff et al.
patent: 3614741 (1971-10-01), McFarland, Jr. et al.
patent: 3760171 (1973-09-01), Wang et al.
patent: 3760370 (1973-09-01), Cochran

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