Coating processes – Electrical product produced
Reexamination Certificate
2000-11-09
2003-04-22
Talbot, Brian K. (Department: 1762)
Coating processes
Electrical product produced
C427S098300, C427S433000, C427S256000, C228S180100, C228S259000, C228S180220
Reexamination Certificate
active
06551650
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates generally to flip-chip technology and particularly to coupling optoelectronic devices using solder bumps in flip-chip technology.
2. Technical Background
Manufacturers in the consumer electronics, telecommunications, engineering industries commonly use flip-chip technology. Flip-chip technology is starting to be used in the hybrid integration of optoelectronic devices to connect, align, and bear or otherwise support active and passive devices. Laser diode array and laser driver chips used in a transmitter module are examples of active devices. An optical star coupler, multiplexer chip, and fibers are examples of passive devices.
For example and according to the “C4” IBM process (see for example “Controlled Collapse Reflow Chip Joining”, L. F. Miller, IBM Journal of Research and Development, 13, 1969), flip-chip technology involves fabricating a lead-tin Pb—Sn (40/60) solder bump generally on copper/aluminum pads located on a wafer and surrounded by a silica top layer. Silica is important because it is a dewetting surface for the solder. Therefore, the lead-tin bump stays confined on the copper/aluminum-wet pad.
Various processes and materials have been developed but the bump structure is for example composed of two main coatings on the copper/aluminum pad (Cu/Al).
First, an under bump plating coating is composed for example of chromium (Cr), copper (Cu) layers, or a combination layer of Cr/Cu. Second, the solder structure is composed of copper (Cu) and tin-lead.
The metal plating introduced between the Al conductive circuit (Al conductive pads) and the solder is an essential factor determining the reliability of the solder bump. The under-bump metallurgy, made by sputtering or evaporation, consists of a series of metal layers providing adhesion to the Al pad and limiting inter-diffusion between the bump metal and the pad. Semi-conductor manufacturers such as IBM initially developed the bumping technology in the seventies. The IBM process, considered as a standard in literature, consists of making a bump structure on aluminum pads.
The classical process for forming solder bumps is based on photolithography and involves the following steps: a) patterning aluminum conductive pads that are surrounded by silica on a silicon mother-board; b) deposition of the under bump metallurgy by sputtering or evaporation; c)depositing, patterning and developing a thick photo-resist; d) electroplating Cu pads and Sn/Pb solder bumps; e) stripping the resist and wet etching the base; and f) reflowing the Sn/Pb pins to form drops.
The wet pads formed in this manner usually have a diameter of 50 &mgr;m in diameter and the height of the solder drop is about 30 &mgr;m.
A recent trend in Flip-Chip technology consists of depositing gold/tin (Au/Sn) (80/20) solder bumps on Ti/Pt/Au pads. As the complexity of interconnection grows, there is a need for an easier, reliable, and practical process to improve the formation of solder bumps that provide satisfactory alignment and bearing properties.
SUMMARY OF THE INVENTION
One aspect of the present invention is a process for fabricating a solder bump on an inorganic de-wetting substrate by applying a wetting metal to create at least one wetting metal pad on the inorganic de-wetting substrate to form a composite substrate. The composite substrate is then dipped into a liquid solder and removed to form solder bumps on the at least one metal wetting pad.
In another aspect, the present invention includes the formation of wetting pads by printing.
Dipping of a wetting/dewetting composite substrate into liquid solder to form solder balls suitable for flip-chip bonding advantageously minimizes process steps. The redrawing of the dipped wetting/dewetting composite substrate results in solder balls having sufficient bearing capabilities. The printing or other formation of wetting pads, the dip/draw of metal drops and the desired bearing effect obtained with these drops provide a simple, fast, reliable and low cost alternative approach, when compared with the current process based on photolithography.
Additional features and advantages of the invention will be set forth in the detailed description which follows, and in part will be readily apparent to those skilled in the art from that description or recognized by practicing the invention as described herein, including the detailed description which follows, the claims, as well as the appended drawings.
It is to be understood that both the foregoing general description and the following detailed description are merely exemplary of the invention, and are intended to provide an overview or framework for understanding the nature and character of the invention as it is claimed. The accompanying drawings are included to provide a further understanding of the invention, and are incorporated in and constitute a part of this specification. The drawings illustrate various embodiments of the invention, and together with the description serve to explain the principles and operation of the invention.
REFERENCES:
patent: 3261713 (1966-07-01), Groten
patent: 5028454 (1991-07-01), Lytle et al.
patent: 5218759 (1993-06-01), Juskey et al.
patent: 5397383 (1995-03-01), Wilczek
patent: 5415679 (1995-05-01), Wallace
patent: 5499312 (1996-03-01), Hahn et al.
patent: 5515604 (1996-05-01), Horine et al.
patent: 5534442 (1996-07-01), Parker et al.
patent: 5535936 (1996-07-01), Chong et al.
patent: 5661831 (1997-08-01), Sasaki et al.
patent: 5783866 (1998-07-01), Lee et al.
patent: 5795619 (1998-08-01), Lin et al.
patent: 5796714 (1998-08-01), Chino et al.
patent: 5814401 (1998-09-01), Gamota et al.
patent: 5825093 (1998-10-01), Guo et al.
patent: 5831832 (1998-11-01), Gillette et al.
patent: 5838069 (1998-11-01), Itai et al.
patent: 5894166 (1999-04-01), Surridge
patent: 6070788 (2000-06-01), Zakel
patent: 6085968 (2000-07-01), Swindlehurst et al.
patent: 0337149 (1999-03-01), None
patent: 57079649 (1982-05-01), None
patent: 02002132 (1990-01-01), None
patent: 09148333 (1997-06-01), None
patent: 08337 (1996-03-01), None
Application of Electroless Nickel Plating in the Semiconductor Microcircuit Industry,K. Wong, K. Chi, A. Rangappan, Plating and Surface Finishing, p. 70-76, Jul. 1988.
Drop Motion on an Inclined Plane and Evaluation of Hydrophobic Treatments to Glass,A. Carre, M.E.R. Shanahan, J. Adhesion, 1995, vol. 49, pp. 177-185.
Optical coupling modeling and passive alignment techniques for parallel optoelectronic interfaces,J.S. Sutherland, PhD Thesis, Cornell University, 1997.
Carre Alain R.
Gerretsen Jurriaan
Agon Juliana
Corning Incorporated
Talbot Brian K.
LandOfFree
Dip formation of flip-chip solder bumps does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Dip formation of flip-chip solder bumps, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Dip formation of flip-chip solder bumps will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-3056566