Active solid-state devices (e.g. – transistors – solid-state diode – Integrated circuit structure with electrically isolated... – With pn junction isolation
Reexamination Certificate
2002-03-26
2004-11-23
Cao, Phat X. (Department: 2814)
Active solid-state devices (e.g., transistors, solid-state diode
Integrated circuit structure with electrically isolated...
With pn junction isolation
C257S484000
Reexamination Certificate
active
06822313
ABSTRACT:
CROSS REFERENCE TO RELATED APPLICATION
This application is based upon and claims the benefit of priority from the prior Japanese Patent Application No. 2001-90061, filed on Mar. 27, 2001; the entire contents of which are incorporated herein by reference.
BACKGROUND OF THE INVENTION
The present invention generally relates to a diode. More specifically, the invention relates to a high-withstand-voltage, high-speed diode.
In general, a diode is used as a switching element in a rolling stock, such as an electric train. A diode of this type requires a high withstand voltage and a high speed operation.
FIG. 7
shows the structure of a cross section of a conventional high-withstand-voltage, high-speed diode, which is a part of diode structure shown in the U.S. Pat. No. 5,631,181.
Referring to
FIG. 7
, a p-type anode layer
102
is selectively diffused and formed in the central portion on the surface of a n
−
-type semiconductor substrate (semiconductor layer)
101
, and an n-type stopper layer
104
is selectively diffused and formed in the peripheral edge portion of the layer
101
so as to surround the p-type anode layer
102
. An anode electrode
103
is formed on the surface of the p-type anode layer
102
so as to ohmic-contact the surface of the p-type anode layer
102
.
On the other hand, an n-type cathode layer
105
is diffused and formed on the whole reverse surface of the layer
101
, and a cathode electrode
106
is formed on the surface of the n-type cathode layer
105
so as to ohmic-contact the surface of the n-type cathode layer
105
.
In such a high-withstand-voltage, high-speed diode, if a forward voltage is applied between the anode electrode
103
and the cathode electrode
106
, holes are injected into the layer
101
from the p-type anode layer
102
, and electrons are injected into the layer
101
from the n-type cathode layer
105
, so that the layer
101
is filled with high densities of holes and electrons to be in a high injection state. If the layer
101
is thus in a high injection state, a current flows between the anode and cathode electrodes at a very low voltage. Therefore, in order to decrease the forward voltage drop (ON-state voltage) of the high-withstand-voltage diode, it is an important design item to fill the layer
101
with pairs of electrons and holes (which will be hereinafter referred to as carriers).
On the other hand, during switching of the diode, it is required to release the carriers accumulated in the layer
101
. As the number of the carriers accumulated in the layer
101
increases, it takes a lot of time to release the carrier, so that switching loss increases. Therefore, in order to improve switching loss, the layer
101
is generally designed to be thinner.
However, the smallest thickness for ensuring a reverse blocking voltage is physically fixed and can not be decreased, so that there is a problem in that switching loss is large.
SUMMARY OF THE INVENTION
According an embodiment of the present invention, there is provided a diode comprising:
a semiconductor layer of a first conductive type having a first principal plane and a second principal plane facing the first principal plane;
a first impurity layer of a second conductive type which is opposite to said first conductive type, said first impurity layer being selectively formed on said first principal plane of said semiconductor layer;
a second impurity layer of the first conductive type which is selectively formed on said first principal plane of said semiconductor layer apart from said first impurity layer;
a first main electrode connected to said first impurity layer;
a second main electrode connected to said second impurity layer;
a third impurity layer of the first conductive type which is selectively formed on said second principal plane of said semiconductor layer and which is formed so as to face said first impurity layer;
a fourth impurity layer of the second conductive type which is selectively formed on said second principal plane of said semiconductor layer and which is formed so as to face said second impurity layer; and
short-circuiting part to electrically connect said third impurity layer to said fourth impurity layer.
According to another embodiment of the present invention, there is provided a diode comprising:
a semiconductor layer of a first conductive type having a first principal plane and a second principal plane facing the first principal plane;
a first semiconductor layer of a second conductive type which is selectively formed on said first principal plane of said semiconductor layer;
a second impurity layer of the first conductive type which is selectively formed on said first principal plane of said semiconductor layer apart from said first impurity layer;
an electrical insulating region which is formed in said first semiconductor layer from said first principal plane of said semiconductor layer between said first and second impurity layers;
a first main electrode connected to said first impurity layer;
a second main electrode connected to said second impurity layer;
a third impurity layer of the first conductive type which is selectively formed on said second principal plane of said semiconductor layer and which is formed so as to face said first impurity layer;
a fourth impurity layer of the second conductive type which is selectively formed on said second principal plane of said semiconductor layer and which is formed so as to face said second impurity layer; and
short-circuit part to electrically connect said third impurity layer to said fourth impurity layer.
According to further embodiment of the present invention, there is provided a diode comprising:
a semiconductor layer of a first conductive type having a first principal plane and a second principal plane facing the first principal plane;
a first impurity layer of a second conductive type which is selectively formed on said first principal plane of said semiconductor layer;
a second impurity layer of the first conductive type which is selectively formed on said first principal plane of said semiconductor layer apart from said first impurity layer;
a low life time region which is formed in said semiconductor layer from said first principal plane of said semiconductor layer between said first and second impurity layers;
a first main electrode connected to said first impurity layer;
a second main electrode connected to said second impurity layer;
a third high-density impurity layer of the first conductive type which is selectively formed on said second principal plane of said semiconductor layer and which is formed so as to face said first impurity layer;
a fourth impurity layer of the second conductive type which is selectively formed on said second principal plane of said semiconductor layer and which is formed so as to face said second impurity layer; and
short-circuit part to electrically connect said third impurity layer to said fourth impurity layer.
REFERENCES:
patent: 4847668 (1989-07-01), Sugawa et al.
patent: 5502329 (1996-03-01), Pezzani
patent: 5559361 (1996-09-01), Pezzani
patent: 5631181 (1997-05-01), Pezzani
patent: 6107673 (2000-08-01), Rivet
patent: 2002/0020893 (2002-02-01), Lhorte
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