Photography – With object illumination for exposure
Reexamination Certificate
2000-02-23
2001-09-25
Perkey, W. B. (Department: 2851)
Photography
With object illumination for exposure
C327S101000, C331S066000, C341S157000
Reexamination Certificate
active
06295413
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to a circuit that digitizes the quantity of light received from a strobe and a circuit that controls the quantity of light emitted by a strobe.
2. Description of the Related Art
Known examples of the prior art technologies include the invention disclosed in U.S. Pat. No. 5,583,605 (Japanese Laid-Open Patent Publication No. H6-308585).
FIG. 26
is a circuit diagram presenting a first example of the prior art technology disclosed in the publication above. In
FIG. 26
, a photodiode PD
1
outputs a photoelectric current that is in proportion to the intensity of light emitted by a strobe (not shown). The photoelectric current output by the photodiode PD
1
charges a capacitor C
1
and gradually raises the potential at the capacitor C
1
. The potential of the capacitor C
1
is input to a −terminal of a comparator CP
1
. In addition, resistors R
3
and R
4
are provided to create a threshold value by dividing a circuit source voltage Vcc, and the threshold value is input to a +terminal of the comparator CP
1
.
The comparator CP
1
outputs High if the potential of the capacitor C
1
is lower than the threshold value and outputs Low if the potential is higher than the threshold value. The output of the comparator CP
1
is latched (sampled) by a D-type flip flop FF
1
over intervals corresponding to the cycle of an oscillation output from an oscillator OSC.
As a result, when the potential at the capacitor C
1
is higher than the threshold value, an output Q is set to Low and an inverting output achieved by inverting Q is set to High at the D-type flip flop FF
1
. Consequently, the inverting output High from the D-type flip flop FF
1
is input to a switching element (analog switch) K
1
to turn on the switching element K
1
.
When the switching element K
1
is turned on, the charge at the capacitor C
1
is discharged via a resistor R
2
. This lowers the potential of the capacitor C
1
. However, when the potential becomes lower than the threshold value, the inverting output of the D-type flip flop FF
1
achieved by inverting Q is set to Low. As a result, the switching element K
1
becomes turned off, thereby stopping the discharge of the capacitor C
1
.
As is obvious from the explanation given above, the circuit shown in
FIG. 26
constitutes a feedback system, in which the potential of the capacitor C
1
is controlled to achieve a value close to the threshold value. Thus, the potential of the capacitor C
1
is controlled to remain almost constant, thereby setting the discharge current of the capacitor C
1
at an almost constant level as well. Consequently, the product of the discharge current value and the length of time of the discharge is almost equal to the quantity of electrical charge achieved per unit time at the photodiode PD
1
.
An OR circuit OR
1
takes an OR of the Q output from the D-type flip flop FF
1
and the oscillator output from the oscillator OSC. When the output from the comparator CP
1
latched by the D-type flip flop FF
1
is at Low, the OR circuit OR
1
outputs a negative pulse as its output OUT over a period of time corresponding to half of the oscillation cycle of the oscillator OSC.
The length of time over which the Q output and the inverting output achieved by inverting Q are respectively at Low and High at the D-type flip flop FF
1
and the number of times a negative pulse is output at the output OUT at the OR circuit OR
1
are in proportion to each other. Consequently, the number of these pulses is almost in proportion to the quantity of electrical charge generated at the photodiode PD
1
.
FIG. 27
is a circuit diagram presenting a second example of the prior art technology disclosed in Japanese Laid-Open Patent Publication No. H6-308585. The circuit in
FIG. 27
is achieved by making the following improvements on the circuit shown in FIG.
26
.
Namely, in
FIG. 26
, Low is output twice by the comparator CP
1
both when, for instance, Low from the comparator CP
1
(the potential at the capacitor C
1
is lower than the threshold value) is sampled by the D-type flip flop FF
1
twice in a row and when the level, e.g. Low-High-Low, is sampled discontinuously. Consequently, in these two cases, the quantities of electrical charges discharged from the capacitor C
1
are, theoretically, equal to each other. In reality, however, these quantities are not equal to each other in the circuit shown in
FIG. 26
due to the transient characteristics manifesting when the switching element (analog switch) K
1
is turned on/off. Namely, when Low is output twice in a row, the transient phenomenon manifesting when the switching element is turned on/off occurs only once. However, if the same output level is not sustained, i.e., if Low is output discontinuously as Low-High-Low, the transient phenomenon manifesting when the switching element is turned on/off occurs twice. As a result, the quantity of electrical charge discharged from the capacitor C
1
when the same output level is sampled continuously differs from the quantity of electrical charge discharged from the capacitor C
1
when different output levels are sampled, due to the difference in the number of times over which the transient phenomenon occurs.
In order to address the problem discussed above, a flip flop FF
2
, which latches the output from the D-type flip flop FF
1
with a delay corresponding to a half cycle is provided in addition to the D-type flip flop FF
1
that latches the output from the comparator CP
1
in the circuit shown in FIG.
27
. Furthermore, a gate OR
2
an a gate NAND
1
are provided to break the period of discharge from the capacitor C
1
at every half cycle of the clock. While the gate OR
1
and the gate OR
2
share the same input, the gate OR
1
is provided simply as a dedicated output element for outputting the number of discharges to the outside as pulses.
Thus, even with the switching element K
1
on continuously in the circuit shown in
FIG. 26
, the discharge from the capacitor C
1
is alternately achieved through the two resistors R
2
and R
6
in the circuit shown in FIG.
27
.
In the circuit shown in
FIG. 27
, the degree of the influence of the transient characteristics remains the same whether the discharge from the capacitor C
1
is implemented continuously or discontinuously, thereby making it possible to discharge a constant quantity of electrical charge. As a result, the accuracy of the measurement of the quantity of light emitted by the strobe improved.
In addition, the prior art technologies that control light emission by a strobe by generating a digital signal indicating the quantity of received light based upon the quantity of strobe light received by a photosensor include an invention disclosed in U.S. Pat. No. 4,249,109 (Japanese Laid-Open Patent Publication No. S 55-93133 and Japanese Examined Patent Publication No. S59-33842).
In the prior art technology that controls the discharges achieved via the resistors (R
2
, R
6
) through the switching element K
1
(or through the outputs of the gate OR
2
and the gate NAND
1
), the following problems arise.
Firstly, in the discharge from the capacitor (C
1
) that has stored the photoelectric current from the photodiode (PD
1
), the discharge period and the quantity of discharged electrical charge are not in accurate proportion to each other due to the influence of the transient characteristics manifesting at the switching element in the discharge circuit. Thus, there is a problem in that the accuracy of the measurement of the quantity of light emitted by the strobe is lowered.
In addition, in the improved circuit shown in
FIG. 27
, the switching operations at the two discharge circuits (the outputs from the gate OR
2
and the gate NAND
1
) may partially overlap, which affects the quantity of discharged electrical charge. Thus, the effect of the transient characteristics at the switching element cannot be completely eliminated in the circuit illustrated in FIG.
27
. As a result, there is a problem in that since the discharge per
Nikon Corporation
Oliff & Beridge PLC
Perkey W. B.
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