Digitally switched potentiometer having improved linearity...

Coded data generation or conversion – Analog to or from digital conversion – Digital to analog conversion

Reexamination Certificate

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C341S145000, C341S154000

Reexamination Certificate

active

06201491

ABSTRACT:

FIELD OF THE INVENTION
This invention relates generally to digitally controlled potentiometers, and more particularly, to digital potentiometers having enhanced linearity and faster settling times.
BACKGROUND OF THE RELATED TECHNOLOGY
Digital potentiometers, sometimes referred to as “voltage-scaling digital-to-analog converters (“DACs”), are replacing analog potentiometers because they are smaller, more easily and accurately set, are controllable remotely, and are becoming lower in cost. The fineness of adjustment or “granularity” of the digital potentiometer is determined by the number of “digital bits” used for the selection of the desired resistance value, i.e., 8 bits allows 256 different resistance selections, 10 bits allows 1024, etc. A disadvantage to finer adjustment granularity (more digital bits) is the rapid increase in the number of components (resistors, switches, decoders and logic circuits) required to implement the digital potentiometer.
Voltage-scaling DACs produce an analog output voltage by selectively tapping a voltage-divider resistor string connected between high and low reference voltages, with the low reference generally being set at ground. These types of converters are used most commonly as building blocks in metal oxide semiconductor (“MOS”) analog-to-digital conversion systems, where they function as the DAC subsection of a successive-approximation-type analog-to-digital converter. For an N-bit voltage-scaling DAC, the resistor string consists of 2
N
identical resistors connected in series, and the DAC is used as a potentiometer in which the voltage levels between the successive series-connected resistors are sampled by means of binary switches. Replacing mechanical potentiometers and rheostats is an important and potentially very high volume application for these devices.
FIG. 1
is a schematic diagram of an N-bit DAC that operates on the voltage-scaling principle. A resistor string consisting of series-connected resistors R
1
, R
2
, R
3
, . . . , R
2
N−1
, R
2
N
is connected between a high reference voltage (VREF+) node
2
and a low reference voltage (VREF−) node
4
, which are typically 5 volts and ground potential, respectively. The voltage drop across each resistor is equal to one least significant bit (LSB) of output voltage change. The output is sampled by a decoding switch network, illustrated as switches S
1
, S
2
, S
3
, . . . , S
2
N
. Each switch taps a different point in the resistor string, so that closing a particular switch while leaving the other switches open places a unique analog voltage on a common output line
6
to which each of the switches is connected. A decoder (not shown) controls the operation of the switches so that the switch whose voltage corresponds to the magnitude of the input digital signal is closed. The signal on analog output line
6
may be sensed by a high-impedance buffer amplifier or voltage follower A
1
, the output of which is connected to an output terminal
8
that provides the final output analog voltage. To ensure the accuracy of the conversion, the buffer amplifier should draw negligible DC bias current compared to the current within the resistor string. A principal drawback of this type of circuit for high-bit-count D/A conversions is the very large number of components required: 2
N
resistors, 2
N
switches and 2
N
logic drive lines. For example, in a 12-bit implementation, this approach would use 4,096 resistors, 4,096 switches and 4,096 logic drive lines. It is highly desirable to significantly reduce this large number of elements for purposes of area savings, higher manufacturing yields and lower costs.
Voltage-scaling DACs are presently available which greatly reduce the number of required resistors and switches by using one resistor string consisting of 2
N/2
resistors for the input digital signal's most significant bits (MSBs), and a separate resistor string also consisting of 2
N/2
resistors for the least significant bits (LSBs). Each resistor in the LSB string has a resistance value equal to ½
N/2
the resistance of each MSB resistor. The opposite ends of the LSB string are connected across one of the MSB resistors. By varying the MSB resistor selected for the LSB string connection and taking an output from the LSB string, outputs in one LSB increments can be obtained over the full range of one to 2
N/2
−1 LSBs.
A reduced parts count resistor-switch configuration for a digital potentiometer is disclosed in U.S. Pat. No. 5,495,245 by James J. Ashe. Referring now to
FIG. 2
, the digital potentiometer disclosed in the Ashe patent uses two outer strings
10
and
12
to provide a decremented voltage pattern that supplies an analog signal corresponding to the MSBs of the input digital signal while an inner string
14
provides an analog signal corresponding to the LSBs; alternately, the outer strings can provide the LSBs and the inner string the MSBs. The two outer strings
10
and
12
are identical, with the high voltage end of the first outer string connected to the high reference voltage, VREF+ and the low voltage end of the second outer string
12
connected to the low reference voltage, VREF−. The opposite ends of the inner string
14
are connected to the first and second outer strings,
10
and
12
, through respective outer switch networks that are operated by a decoder (not illustrated), the decoder in effect causes the opposite ends of the inner string to “slide” along the two outer strings. This “sliding” keeps a constant number of outer string resistors in the circuit, regardless of where the outer strings are tapped. No active elements are required to buffer the inner string from the outer string, which allows the circuit disclosed to be used as a potentiometer or rheostat. The output voltage is obtained by tapping a desired location in the inner string
14
. In the Ashe invention, regardless of whether the MSB values are produced by the inner or outer strings, each MSB resistor string includes 2
N/2
−1 resistors of resistance value R, and 2
N/2
switches. Each LSB string includes 2
N/2
resistors of resistance value R/2
N/2
, and 2
N/2
switches. The Ashe digital potentiometer results in a significant reduction in the number of both resistors and switches, compared to the potentiometer circuit illustrated in FIG.
1
.
The digital potentiometer disclosed in Ashe has inherent non-linearity due to resistor, interconnect and switch resistance mismatches, and also long switching settling times caused by large internal capacitance from the parallel connected switches located on the output taps of the MSB resistor strings.
Therefore, what is needed is a digital potentiometer which retains the simplicity and economy of having a reduced number of resistors and switches in a combination of major and minor resistor strings and switches, but having improved linearity and reduced settling times when resistance values are switched.
SUMMARY OF THE INVENTION
The invention overcomes the above-identified problems as well as other shortcomings and deficiencies of existing technologies by providing a digital potentiometer having improved linearity and reduced settling times when resistance values are switched. An embodiment of the present invention digital potentiometer may be fabricated on an integrated circuit die using complementary metal oxide semiconductor (CMOS) transistors for the switches.
An embodiment of the invention uses two scaled minor resistor strings (LSB) as the upper and lower ranks, and a major resistor string (MSB) as the bridge rank connected between the upper and lower ranks. The switches for the upper and lower ranks are connected between the respective voltage references and the series-connected resistors of the upper and lower ranks. Additional switches are connected from the bridge rank (MSB) resistors to the output node (wiper) of the digital potentiometer. The MSB portion of the digital value is selected with one of the bridge rank switches, and the LSB portion of the digital value is selected with a pair of swi

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