Digitally controlled element sizing

Electrical transmission or interconnection systems – Nonlinear reactor systems – Parametrons

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Details

307570, 307270, 307475, H03K 102, H03K 1730

Patent

active

051947650

ABSTRACT:
Effective control of impedance values in integrated circuit applications is achieved with an integrated circuit transistor whose size is digitally controlled. The digitally controlled size is achieved, for example, with a parallel interconnection of MOS transistors. In one application, the digitally controlled transitor serves as a controlled impedance connected to an output terminal of an integrated circuit. In that application, a number of transistors are enabled with control signals, and the collection of enabled transistors is responsive to the input signal that normally is applied to a conventional transistor. In another application, where the digitally controlled transistor serves as a controlled impedance at the input of a circuit, only the control signals that enable transistors and thereby determine the effective developed impedance are employed. In still another application, the digital control of the transistor's size is employed to control the speed or power consumption of the effective transistor. Such control is exercised to erase the manufacturing variability of the integrated circuit. Alternatively, such control is exercised as part of a feedback control of the operational characteristics of the entire circuit. In the feedback control application, the digital signals that control the transistor's size are obtained from an assessment of the circuit's operation. In the manufacturing variability control application, the digital signals that control the transistor's size are obtained from a measure of the integrated circuit's parameters relative to a reference element.

REFERENCES:
patent: 4584492 (1986-04-01), Sharp
patent: 4691127 (1987-09-01), Huizer
patent: 4825101 (1989-04-01), Walters, Jr.
patent: 4855623 (1989-08-01), Flaherty
patent: 5095231 (1992-03-01), Satori et al.
"A Self-Terminating Low-Voltage Swing CMOS Output Driver", IEEE Journal of Solid-State Circuits, vol. 23, No. 2, Apr. 1988, Thomas F. Knight, Jr., pp. 457-464.

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