Electrical computers: arithmetic processing and calculating – Electrical analog calculating computer – Particular function performed
Patent
1998-07-22
2000-10-31
Mai, Tan V.
Electrical computers: arithmetic processing and calculating
Electrical analog calculating computer
Particular function performed
708802, 708602, G06G 738, G06G 732, G06J 100
Patent
active
061416762
ABSTRACT:
A programmable Very Large Scale Integration (VLSI) chip and method for the analog solution of a family of partial differential equations commonly encountered in engineering and scientific computing: The Laplace equation, the diffusion or conduction equation, the wave equation, the Poission equation, the modified diffusion equation, the modified wave equation, and the wave equation with damping.
REFERENCES:
patent: 3953721 (1976-04-01), Johnson et al.
patent: 4734879 (1988-03-01), Lin et al.
patent: 4817027 (1989-03-01), Plum et al.
patent: 5045713 (1991-09-01), Shima
patent: 5068662 (1991-11-01), Guddanti et al.
patent: 5107442 (1992-04-01), Weideman
patent: 5121467 (1992-06-01), Skeirik
patent: 5140538 (1992-08-01), Bass et al.
patent: 5140670 (1992-08-01), Chua et al.
J. Ramirez-Angulo, et al., "CMOS Cells for Analog VLSI LaPlace Equation Solver Based on the Resistive Analogy Method", Proceedings IEEE Midwest Symposium on Circuits and Systems (1992).
H. Korayashi, et al., "An Active Resistor Network for Gaussian Filtering of Images", IEEE Journal of Solid-State Circuits, vol. 26, No. 5, pp. 738-748 (1991).
E. Sanchez-Sinencio, et al., Operational Transconductance Amplifier (OTA)-Based Nonlinear Function Systheses, IEE Journal of Solid State Circuits, vol. 24, No. 6, pp. 1576-1586 (1989).
Tamas Roska, et al., "Cellular Neural Networks with Nonlinear and Delay-Type Template Elements", proceedings IEEE International Workshop on Cellular Neural Networks and Their Applications CNNA-90 pp. 12-25 (1990).
U. Ramacher, "The VLSI Kernel of Neural Algorithms", proceedings IEEE International Workshop on Cellular Neural Networks and Their Applications CNNA-90. pp. 185-196 (1990).
R. Tomovic, et al., "High Speed Analog Computers", published by John Wiley 7 Sons, New York (1962), Textbook.
W.J. Karplus, it al., "Analog Methods" published by McGraw-Hill New York (1959) Textbook.
W.J. Karplus, it al., "Analog Simulation, Solution of field Problems" published by McGraw-Hill New York (1958) Textbook.
A.S. Sedra, et al., "Filter Theory and Design: Active and Passive", Chapter 6, published by Matrix Publishers, Beaverton, Oregon (1978) Textboook.
R.L. Geiger, et al., "VLSI Design Techniques for Analog and Digital Circuits". published by McGraw-Hill, New York (1990) Testbook.
G. Liebmann, et al., "Solution of Partial Differential Equations with Resistance Network Analogue", British Journal of Applied Physics, vol. 1, No. 4, pp. 92-103 (1950).
G. Liebmann, et al., "Electrical Analogues", British Journal of Applied Physics, vol.. 4, pp. 193-200 (1953).
W.J. Karplus, et al., "The Use of Analog Computers with resistance Network Analogues", British Journal of Applied Physics, vol.. 6, pp. 356-357 (1955).
M.P. Kennedy, et al., "Neural Networks of Nonlinear Programming", IEEE Transactions on Circuits and Systems, vol. 35, No. 5, pp. 554-562 (1988).
A. Rodriguez-Vazques, et al., "Non linear Switched Capacitor `Neural` Networks for Optimization Problems", IEEE Transactions on Circuits and Systems, vol. 37, No. 3, pp. 384-398 (1988).
L.O. Chua, et al., "Cellular Neural networks: Theory", IEEE Transactions on Circuits and Systems, vol. 35, No. 10, pp. 1257-1272 (1988).
K.R. Kreig, et al., "Analog Signal Processing Using Cellular Neural Networks", IEEE ISCAS, pp. 958-961 (1990).
L. Yang, et al., "VLSI Implementation of Cellular Neural Networks", IEEE ISCAS, pp. 2425-2427 (1990).
L.O. Chua, et al., "Cellular Neural networks: Applications", IEEE Transactions on Circuits and Systems, vol. 35, No. 10, p. 1273-1290 (1988) .
DeYong Mark R.
Ramirez-Angulo Jaime
Mai Tan V.
Myers Jeffrey D.
New Mexico State University Technology Transfer Corporation
LandOfFree
Digitally-configurable analog VLSI chip and method for real-time does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Digitally-configurable analog VLSI chip and method for real-time, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Digitally-configurable analog VLSI chip and method for real-time will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-2064888