Television – Format conversion – Changing number of lines for standard conversion
Reexamination Certificate
2000-07-05
2003-07-29
Lee, Michael H. (Department: 2614)
Television
Format conversion
Changing number of lines for standard conversion
C348S581000, C345S667000
Reexamination Certificate
active
06600514
ABSTRACT:
FIELD OF THE INVENTION
The invention relates to a digital video-processing unit for processing an input data signal to an output data signal for an output device, the input data signal representing a sampled image comprising a number of lines, said video-processing unit comprising
first memory means for storing the input data signal,
processing means for processing the stored input data signal to an output data signal,
second memory means for storing the output data signal prior to supply to the output device,
a memory manager being coupled to first and second memory means and the processing means being arranged to transfer the input data signals to the first memory means, to transfer the stored input data signal to the processing means, to transfer output data to the second memory means and to provide the stored processed data to the output device.
The invention further relates to a video display system.
BACKGROUND OF THE INVENTION
Such a video-processing system and display system generally use spatial light modulators such as a liquid crystal display or a digital micro-mirrored device (DMD). These spatial light modulators comprise a number of pixels arranged in a rectangular matrix. This matrix comprises a number of rows and columns. Each row comprises an equal number of pixels. In general, the number of rows does not match with the number of rows of the input data signal to be displayed, or the aspect ratio of the image represented by the input data signal does not match with the aspect ratio of the spatial light modulator. Therefore, the processing means resizes the input data in such a way that the number of rows of the resized output data matches the number of rows of the matrix, or the aspect ratio of the image of the resized data output signal matches the aspect ratio of the matrix. During video processing, the resizing operation can be performed, for example, by a separable N-tap two-dimensional filter, where N>2. Such a filter operation can be performed as a cascade of two N-tap one-dimensional filters, namely a first one-dimensional filter for a first, horizontal direction and a second one-dimensional filter for a second, vertical direction. For a high-speed operation of the N-tap one-dimensional filter in the vertical direction, information corresponding to N lines of the image is required. An obvious solution is the application of line memories inside the processing means. When no line memories are used in the processing means, the required bandwidth to the first frame buffer increases by a factor N. When the processing means comprises N line memories for storing the N adjacent lines of input data, the samples of the output data signal are generated from a weighted sum of the samples present in the line memories. A disadvantage of the known video processing unit is that the N line memories require many logic gates in the digital video processing unit.
SUMMARY OF THE INVENTION
It is, inter alia, an object of the invention to provide a video-processing unit with an economic architecture capable of handling resizing input data. To this end, a video-processing unit according to the invention is characterized in that the processing means is arranged to process of a data set comprising a first set of samples corresponding to a block of the sampled image, the first set of samples being composed of a predetermined first number of samples selected from each one of a predetermined second number of lines of the sampled image, the first number of selected samples of each line being smaller than the total number of samples of a line. By using a first number of samples in the blocksize which is lower than the total number of samples of one line, the size of memory means in the processing unit can thus be reduced. Furthermore, this reduction of memories in the processing means allows an economic architecture of the video-processing unit having a reduced number of gates. Further advantageous embodiments of the invention are defined in the dependent claims.
A particular embodiment of the video processing unit according to the invention is characterized in that the memory manager is arranged to provide a third number of said data sets to the processing means, which third number depends on the total number of samples of the single line, the first number of selected samples, the total number of lines of the image and the second number of lines. The third number may be equal to the product of the total number of samples of the single line divided by the first number of selected samples and the total number of lines of the image divided by the second number of adjacent lines. In this way, the memory manager ensures that the complete image present in the first memory means is processed.
A further embodiment of the video-processing unit according to the invention is characterized in that the predetermined second number is smaller than or equal to half the total number of lines of the sampled image. When the number of blocks in a vertical direction of the sampled image is two or more, motion artefacts can be eliminated, because the number of blocks in a horizontal direction of the sampled image is processed. The processed lines of the blocks can be displayed.
A further embodiment of the video-processing unit according to the invention is characterized in that the processing means comprises an N-tap two-dimensional digital filter, wherein N is equal to or larger than 2. An example of such a digital filter is a separable N-tap two-dimensional digital filter.
A further embodiment of the video-processing unit according to the invention is characterized in that the video-processing unit comprises N line memory means, each of which is arranged to store the number of selected samples of one of N selected lines, wherein N is equal to or larger than 2.
A further embodiment of the video processing unit according to the invention is characterized in that the data set further comprises a second set of samples composed from a neighborhood of the block of the image. Run-in artefacts due to the block boundaries in the sampled image are thus reduced.
A further embodiment of the video-processing unit according to the invention is characterized in that the neighborhood extends in a first dimension of the sampled image to a first sampling distance corresponding to a first run-in time of the N-tap two-dimensional digital filter in the first dimension, and the neighborhood extends in a second dimension of the sampled image to a second sampling distance corresponding to a second run-in time of the N-tap two-dimensional digital filter in the second dimension. In this way, run-in artefacts due to the block boundaries can be avoided.
The invention further relates to a video display system. It is an object of the invention to provide a video display system with an economic architecture capable of handling resizing input data. To this end, a video display system according to the invention is characterized in that the video display system comprises a digital video-processing unit as described hereinbefore, wherein the output comprises a display unit which is coupled to the output of said digital video-processing unit for displaying the output data signal.
REFERENCES:
patent: 4471381 (1984-09-01), Kasuga et al.
patent: 5172103 (1992-12-01), Kita
patent: 5587742 (1996-12-01), Hau et al.
Lammers Matheus J. G.
Van Asma Cornelis G. M.
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