Facsimile and static presentation processing – Facsimile – Specific signal processing circuitry
Patent
1979-05-08
1980-08-19
Griffin, Robert L.
Facsimile and static presentation processing
Facsimile
Specific signal processing circuitry
358 22, H04N 522
Patent
active
042187109
ABSTRACT:
In a digital video effect system, only one one-frame RAM (30) produces a mixed and phase-locked signal (14) for n individually synchronized input television signals (11, 12) when read by horizontal and vertical address signals (48, 49) derived from a reference timing signal (15) in synchronism with horizontal and vertical synchronizing pulses included therein. Digital video signals (39') and vertical address signals (29') derived from n or (n-1) input television signal or signals are written in n or (n-1) four-line RAM (80) by horizontal address signals (28') derived also therefrom and read by horizontal address signals (48 or 28) derived either from the timing signal or one of the n input television signals. Thus horizontally phase-locked digital video signals (39, 83) are written in the one-frame RAM by the last-mentioned horizontal address signals and likewise horizontally phase-locked vertical address signals (29, 84).
REFERENCES:
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patent: 3944731 (1976-03-01), Busch
patent: 3961133 (1976-06-01), Bennett
patent: 4001498 (1977-01-01), Morishita
patent: 4007486 (1977-02-01), Inaba
patent: 4054904 (1977-10-01), Saitoh
patent: 4139860 (1979-02-01), Micic
patent: 4164760 (1979-08-01), Inaba
Kashigi Kazuo
Koyama Toshitake
Griffin Robert L.
Masinick Michael A.
Nippon Electric Company Ltd.
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