Television – Camera – system and detail – Combined image signal generator and general image signal...
Reexamination Certificate
1997-01-09
2001-10-16
Garber, Wendy R. (Department: 2612)
Television
Camera, system and detail
Combined image signal generator and general image signal...
C348S241000
Reexamination Certificate
active
06304292
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to a digital video camera. More specifically, the present invention relates to a digital video camera in which a camera signal obtained from a CCD imager having a mosaic-type color filter or a stripe-type color filter is digitally processed such that an OB (optical black) level is clamped.
2. Description of the Prior Art
One example of a conventional digital video camera in which an OB level can be clamped with using a simple circuit is described in, for example, Japanese Patent Application Laying-open No. 5-244490 [H04N 5/243, 5/16, 5/335, 9/04, 9/72] laid-open on Sep. 21, 1993.
In the prior art, an offset is added to an output of a CCD imager, and a clamp level, which is calculated on the basis of an OB level at a back end of the output of the CCD imager, is subtracted from an addition result, and the offset is subtracted again from a subtraction result. Therefore, a video signal having no black level deviation can be obtained. In addition, “the black level deviation” means an phenomenon that a black level raised above a reference black level and thus a black imge is displayed as a grayish black image.
On the other hand, other examples of a digital video camera having a quadruplication mode are described in, for example, Japanese Patent Application Laying-open No. 63-250287 [H04N 5/225, 5/335, 3/00] laid-open on Oct. 18, 1988, Japanese Patent Application Laying-open No. 7-212657 [H04N 5/335, H01L 27/12] laid-open on Aug. 11, 1996, and a U.S. patent application Ser. No. 08/188,543 [H04N 5/335, H01L 27/12] filed on Jan. 28, 1994. In each of the prior art references only a portion of an output of a CCD imager is used as a camera signal, and the remainder is swept-out to a drain.
Accordingly, it is impossible to apply the former prior art to the latter prior art references because the output of the CCD imager having the OB level at the back end, the OB level being utilized in the former prior art, is swept-out in the latter prior art references.
SUMMARY OF THE INVENTION
Therefore, a principal object of the present invention is to provide a digital video camera capable of surely clamping an OB level in a quadruplication mode.
According to the present invention, a digital video camera comprises: a switching means for switching between a first mode in which a whole of each line signal outputted from a CCD imager is utilized for displaying an image and a second mode in which only a portion of each line signal, including a front end, is utilized for displaying an image; a first period defining means for defining a first predetermined period at a back end of the line signal in the first mode; a second period defining means for defining a second predetermined period at the front end of the line signal in the second mode; an A/D conversion means for converting the line signal obtained from the CCD imager into a digital signal; a clamp level calculation means for calculating a clamp level on the basis of the digital signal outputted from the A/D conversion means in one of the first predetermined period and the second predetermined period; and a clamping means for clamping the line signal at the clamp level.
A digital video camera further comprises: a first subtraction means for subtracting a clamp level from a digital signal from the A/D conversion means; an addition means for adding a predetermined offset to one of the digital signal from the A/D conversion means and a clamped digital signal from the first subtraction means; a clipping means for zero-clipping a digital signal that the predetermined offset has been added by the addition means; a low-pass filter means for processing a digital signal outputted from the clipping means; and a second subtraction means for subtracting the predetermined offset from a digital signal from the low-pass filter means.
A line signal, which is outputted from the CCD imager and in which reset noise is reduced by a correlative double sampling circuit, is applied to an automatic gain control (AGC) circuit, for example, whereby an amplitude of the line signal is properly adjusted. Then, an output of the AGC circuit is converted into the digital signal by the A/D conversion means.
The switching means switches the first mode, or the second mode such as a quadruplication mode. The first period defining means, such as a back end clamp timing circuit, for example, defines the first predetermined period including a portion having an OB level at the back end of each line. The second period defining means, such as a front end clamp timing circuit, for example, defines the second predetermined period including a portion having an OB level at the front end of each line.
The clamp level calculation means calculates an average of the OB level (reference level) in the first predetermined period or the second predetermined period for each line on the basis of the digital signal from the A/D conversion means, and calculates the clamp level based on the average level by a recursive digital filter.
The clamp level is subtracted from the digital signal outputted from the A/D conversion means by the subtraction means, whereby the digital signal is clamped. On the other hand, the addition means are provided between the A/D conversion means and the first subtraction means or at a succeeding stage of the first subtraction means, and the addition means add the predetermined offset to the digital signal from the A/D conversion means or the clamped digital signal from the first subtraction means. If a digital signal from the addition means is zero-clipped by the clipping means, a negative component of a random noise remains in the digital signal due to the addition of the offset. Accordingly, if a digital signal from the clipping means is applied to the low-pass filter means, and thereafter, the offset having the same level as the offset added by the addition means is subtracted from a digital signal from the low-pass filter, the OB level becomes substantially zero. Therefore, no black level deviation occurs.
According to the present invention, since the clamp level can be calculated even if any of the first mode and the second mode is selected by the switching means, the OB level can be surely clamped only by providing the clamping means at a succeeding stage of the A/D conversion means for each channel. Furthermore, since the same offset is first added by the addition means, and then, subtracted from the digital signal by the offset by the second subtraction means after the clipping circuit and the low-pass filter means, the OB level substantially becomes the zero level. Accordingly, it is possible to prevent the black level deviation from occurring.
The above described objects and other objects, features, aspects and advantages of the present invention will become more apparent from the following detailed description of the present invention when taken in conjunction with the accompanying drawings.
REFERENCES:
patent: 4500915 (1985-02-01), Koike et al.
patent: 4740828 (1988-04-01), Kinoshita
patent: 4774586 (1988-09-01), Koike et al.
patent: 4856033 (1989-08-01), Hirota et al.
patent: 4910599 (1990-03-01), Hashimoto
patent: 5040071 (1991-08-01), Stevens
patent: 5172234 (1992-12-01), Arita et al.
patent: 5343245 (1994-08-01), Kim
patent: 5448306 (1995-09-01), Koyama
patent: 0 282 993 (1988-09-01), None
patent: 0 391 690 (1990-10-01), None
patent: 0 633 691 (1995-01-01), None
patent: 5-244490 (1993-09-01), None
patent: 5244490 (1993-09-01), None
patent: 7212657 (1994-01-01), None
patent: 0633691 (1995-01-01), None
patent: 7-212657 (1995-08-01), None
Ide Hirokazu
Ishigamii Tomio
Kobayashi Akio
Kobayashi Atsushi
Murata Haruhiko
Garber Wendy R.
Harrington Alicia M
Michaelson Peter L.
Michaelson & Wallace
Sanyo Electric Co,. Ltd.
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