Digital tunable inter-stage matching circuit

Amplifiers – With semiconductor amplifying device – Including plural stages cascaded

Reexamination Certificate

Rate now

  [ 0.00 ] – not rated yet Voters 0   Comments 0

Details

C330S302000

Reexamination Certificate

active

08072272

ABSTRACT:
A tunable inter-stage matching circuit that can improve performance is described. In an exemplary design, an apparatus includes a first active circuit (e.g., a driver amplifier), a second active circuit (e.g., a power amplifier), and a tunable inter-stage matching circuit coupled between the first and second active circuits. The tunable inter-stage matching circuit includes a tunable capacitor that can be varied in discrete steps to adjust impedance matching between the first and second active circuits. In an exemplary design, the tunable capacitor includes (i) a plurality of capacitors coupled in parallel and (ii) a plurality of switches coupled to the plurality of capacitors, one switch for each capacitor. Each switch may be turned on to select an associated capacitor or turned off to unselect the associated capacitor. The tunable capacitor may further include a fixed capacitor coupled in parallel with the plurality of capacitors.

REFERENCES:
patent: 4559503 (1985-12-01), Camand et al.
patent: 6215359 (2001-04-01), Peckham et al.
patent: 6603351 (2003-08-01), Suzuki
patent: 7009455 (2006-03-01), Toncich et al.
patent: 7151411 (2006-12-01), Martin et al.
patent: 7616054 (2009-11-01), Jeon et al.
patent: 2004/0224649 (2004-11-01), Shamsaifar
patent: 2005/0225388 (2005-10-01), Ramachandran et al.
patent: 2006/0028301 (2006-02-01), Kamata et al.
patent: 2007/0218844 (2007-09-01), Alanen et al.
patent: 2007/0222523 (2007-09-01), Arell
patent: 2008/0026709 (2008-01-01), Liu et al.
patent: 2009/0002077 (2009-01-01), Rohani et al.
patent: 11055047 (1999-02-01), None
patent: 2008219758 (2008-09-01), None
Chowdhury D et al., “A single-chip highly linear 2.4GHz 30dBm power amplifier in 90nm CMOS”, Solid-State Circuits Conference—Digest of Technical Papers, 2009, ISSCC 2009, IEEE International, IEEE, Piscataway, NJ, USA, Feb. 8, 2009, pp. 378-379,379A, XP031466144, ISBN, 978-1-4244-3458-9.
International Search Report and Written Opinion—PCT/US2010/046021—ISA/EPO—Mar. 9, 2011 (093258).
Minsik Ahn et al., “A Novel Multi-Stack Device Structure and its Analysis for High Power CMOS Switch Design”, Microwave Symposium, 2007. IEEE/MTT-S International, IEEE, PI, Jun. 1, 2007, pp. 1393-1396, XP031112198, ISBN, 978-1-4244-0687-6.
Tongqiang Gao et al., “A novel CMOS transmitter front-end for mobile RFID reader”, Radio Frequency Integrated Circuits Symposium, 2009. RFIC 2009. IEEE, IEEE, Piscataway, NJ, USA, Jun. 7, 2009, pp. 105-108, XP031480236, ISBN, 978-1-4244-3377-3.
Wang et al., “A Nonlinear Capacitance Cancellation Technique and its Application to a CMOS Class AB Power Amplifier,” 2001, IEEE Radio Frequency Integrated Circuits Symposium.

LandOfFree

Say what you really think

Search LandOfFree.com for the USA inventors and patents. Rate them and share your experience with other people.

Rating

Digital tunable inter-stage matching circuit does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Digital tunable inter-stage matching circuit, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Digital tunable inter-stage matching circuit will most certainly appreciate the feedback.

Rate now

     

Profile ID: LFUS-PAI-O-4301676

  Search
All data on this website is collected from public sources. Our data reflects the most accurate information available at the time of publication.