Digital transmitter employing digital signal generator...

Pulse or digital communications – Equalizers

Reexamination Certificate

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Details

C375S296000

Reexamination Certificate

active

06278731

ABSTRACT:

FIELD OF THE INVENTION
The present invention relates generally to data communication and more particularly relates to a digital transmitter utilizing a digital signal generator and associated stored waveforms.
BACKGROUND OF THE INVENTION
Digital data communication systems are currently enjoying widespread use due to their benefits over analog communication systems. Typically, most data communication systems utilize filters in generating the data to be transmitted. Filters are especially used in communication systems that employ modems to transmit digital data over analog transport facilities. Most modems include wave shaping circuitry for generating appropriate signals for transmission over the analog communication channel. Note that the analog communication channel may comprise copper, waveguide, optical fiber, RF, microwave, IR, etc.
The function of the modem is to accept the digital data to be transmitted and generate analog signals suitable therefrom for transmission over the analog communication channel. To perform this function, modems employ wave shaping circuitry to first shape the input digital waveform and subsequently modulate this waveform with a carrier frequency signal. The wave shaping is performed to provide the transmitted signal with spectral characteristics suitable to the particular communication channel the data is to be transmitted on.
The shaping circuitry used in prior art transmission systems typically utilized large amounts of memory storage to store the waveform to be used in shaping the input digital data U.S. Pat. No. 5,548,541, issued to Bierman et al. teaches a finite impulse response (FIR) filter for shaping a one bit serial digital data pulse train. The filter employs a delay element for sequentially receiving binary data bits in the data pulse train at fixed data cycle intervals and outputting simultaneously in parallel a plurality of data bits representing the most recent history of the past N data cycle intervals. Also included is a sample element for sampling the pulse train and a memory device for storing output values.
With this type of system, as the number of samples for each symbol increases, the memory required for storage of the waveform also increases by a large amount. Thus, there is a need for a communication system which reduces the storage requirements for a given number of waveform samples per symbol.
SUMMARY OF THE INVENTION
The present invention is a digital signal generator (digital data generator) which can be utilized to provide an efficient way to implement a digital transmitter based on storage of waveforms in a memory device such as a ROM or PROM. Assuming a symbol rate of 1T and a transmitter basic waveform having a duration 2NT, the digital signal generator presented herein reduces storage requirements by a factor of 2
N+1
relative to prior art classical approaches which are typically memory based, e.g., ROM or RAM implementations.
The digital data generator employs a shift register into which the received digital data is input. The length of the shift register is 2N which represents the number of symbol periods of the output shaping waveform. For example, if the symbol period is denoted by T, the shaping waveform may span 8 symbol periods. Thus, the length of the shift register in this example would be 8 and N would equal 4.
The shift register is divided into precursor and postcursor portions since the shaping waveform typically comprises both past and future portions. To accommodate the future portion of the shaping waveform, the data transmitted at any time t corresponds to the center of the shift register with equal size data considered for the precursor and the postcurcor portions.
The output of the shift register is input to an address generator circuit which outputs the address bits for input to a memory storage device such as a ROM or PROM. A counter functions to count modulo the number of samples per symbol. The output of the memory storage device is further processed to yield the digital output signal.
Due to the independence of the postcursor and precursor contributions to the output waveform, the output waveforms for the precursor and postcursor portions of the shift register can be divided into two parts and generated independently. Thus, a reduction in the amount of memory storage required may be achieved by storing waveform data only for either the postcursor or the precursor. In this case, the same storage device is used but the addresses is alternatively applied for the precursor and the postcursor. The postcursor and precursor outputs of the memory storage device are stored and the two output values are summed to generate the digital output data signal. Given that n
s
denotes the number of samples per symbol, this provides a reduction in the required memory space from n
s
·2
2N
(the prior art requirement) to 2·n
s
·2
N
which represents a reduction by a factor of
2
N
2
.
In addition, advantage can be taken of the fact that the shaping waveform is mostly symmetrical around the y-axis (which is usually the case) and thus only ½ of the samples need be stored. This provides a reduction in the required memory space from 2·n
s
·2
N
to n
s
·2
N
which represents a reduction by a factor of 2.
A further reduction in storage memory can be achieved by taking advantage of the substantial symmetry in amplitude of the waveform data. Since the input data is a real binary bit stream, the waveforms corresponding to ‘0’ and ‘1’ bits are inverted with respect to each other, e.g., +1 and −1. Thus, only a single version of the shaping waveform need be stored, the other being generated by multiplying by −1. This provides another reduction in the required memory space from
n
s
·
2
N



to



1
2



n
s

2
N
which represents an additional reduction by a factor of 2.
In total, the present invention yields a reduction in memory storage requirements by a factor of 2
N+1
.
There is provided in accordance with the present invention a digital data generator for shaping an input digital data stream in accordance with a shaping waveform to yield a digital output data stream, the digital data generator comprising a delay element of length 2N wherein 2N represents the time duration of the shaping waveform, the delay element adapted to receive the input digital data stream and is divided into a precursor portion and a postcursor portion, an address generator for generating a precursor address in accordance with the precursor portion and a postcurcor address in accordance with the postcursor portion, a multiplexor for muxing the precursor address and the postcursor address to yield a first lookup address and a second lookup address during each sample cycle, lookup means operative to output a first value in accordance with the first lookup address and a second value in accordance with the second lookup address, summing means adapted to sum together the first value and the second value output from the lookup means to yield the digital data output stream and wherein the number of entries required in the lookup means is equal to
n
s
·
2
N
2
,
where n
s
represents the number of samples per symbol and N represents ½ the number of periods of the shaping waveform.
There is also provided in accordance with the present invention a digital data generator for shaping an input digital data stream in accordance with a shaping waveform to yield a digital output data stream, the digital data generator comprising a delay element of length 2N wherein 2N represents the time duration of the shaping waveform, the delay element adapted to receive the input digital data stream and is divided into a precursor portion and a postcursor portion, an address generator for generating a precursor address in accordance with the precursor portion and a postcurcor address in accordance with the postcursor portion, lookup means operative to output a first value of a shaping waveform sample in accordance with the first lookup address and a second value of a

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