Digital traffic coordinator

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Details

307203, 340 41R, G06F 1548

Patent

active

040619028

ABSTRACT:
There is provided a coordinator for creating a desired background cycle time and controlled logic conditions on selected output circuits during the background cycle which cycle and logic conditions are used in governing the signalization of a traffic intersection. This coordinator includes a pulse counter for counting between 0 and 99 upon receipt of counting pulses and having output means for creating a distinct signal upon counting to each digit in the range of 0 to 99. There is further provided means for controlling the frequency of the counting pulses to a frequency equal to one hundred divided by the time of a desired background cycle in seconds and decoding means for creating the selected logic conditions in output circuits when the counter counts to a selected number in the range of 0 to 99.

REFERENCES:
patent: 3525980 (1970-08-01), Schmidt et al.

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